libmach, acid, db: 64-bit support

22 files changed, 1968 insertions, 1036 deletions

diff --git a/src/libmach/Linux.c b/src/libmach/Linux.c
index 2a06f6a1..005d6b38 100644
--- a/src/libmach/Linux.c
+++ b/src/libmach/Linux.c
@@ -36,8 +36,8 @@ struct PtraceRegs
 	int pid;
 };
 
-static int ptracesegrw(Map*, Seg*, ulong, void*, uint, int);
-static int ptraceregrw(Regs*, char*, ulong*, int);
+static int ptracesegrw(Map*, Seg*, u64int, void*, uint, int);
+static int ptraceregrw(Regs*, char*, u64int*, int);
 
 static int attachedpids[1000];
 static int nattached;
@@ -173,7 +173,7 @@ ptraceerr:
 }
 
 static int
-ptracesegrw(Map *map, Seg *seg, ulong addr, void *v, uint n, int isr)
+ptracesegrw(Map *map, Seg *seg, u64int addr, void *v, uint n, int isr)
 {
 	addr += seg->base;
 	return ptracerw(isr ? PTRACE_PEEKDATA : PTRACE_POKEDATA, PTRACE_PEEKDATA,
@@ -212,7 +212,7 @@ reg2linux(char *reg)
 }
 
 static int
-ptraceregrw(Regs *regs, char *name, ulong *val, int isr)
+ptraceregrw(Regs *regs, char *name, u64int *val, int isr)
 {
 	int pid;
 	ulong addr;
diff --git a/src/libmach/crack.c b/src/libmach/crack.c
index fceba541..6d167404 100644
--- a/src/libmach/crack.c
+++ b/src/libmach/crack.c
@@ -93,7 +93,7 @@ uncrackhdr(Fhdr *hdr)
 }
 
 int
-mapfile(Fhdr *fp, ulong base, Map *map, Regs **regs)
+mapfile(Fhdr *fp, u64int base, Map *map, Regs **regs)
 {
 	if(fp == nil){
 		werrstr("no file");
diff --git a/src/libmach/crackelf.c b/src/libmach/crackelf.c
index e80d9ec3..22f4307e 100644
--- a/src/libmach/crackelf.c
+++ b/src/libmach/crackelf.c
@@ -4,7 +4,7 @@
 #include "elf.h"
 #include "dwarf.h"
 
-static int mapelf(Fhdr *fp, ulong base, Map *map, Regs**);
+static int mapelf(Fhdr *fp, u64int base, Map *map, Regs**);
 static int unpacknote(Elf *elf, uchar *a, uchar *ea, ElfNote *note, uchar **pa);
 
 static struct
@@ -21,6 +21,7 @@ static struct
 	ElfMachArm,		MARM,		nil,		"arm",
 	ElfMachPower,	MPOWER,		nil,		"powerpc",
 	ElfMachPower64,	MNONE,		nil,		"powerpc64",
+	ElfMachAmd64,	MAMD64,	&machamd64,	"amd64",
 };
 
 static struct
@@ -44,7 +45,8 @@ static struct
 {	/* Font Tab 4 */
 	M386,		ALINUX,		elfcorelinux386,
 	M386,		ANONE,		elfcorelinux386,	/* [sic] */
-/*	M386,		AFREEBSD,	elfcorefreebsd386, */
+//	M386,		AFREEBSD,	elfcorefreebsd386,
+	MAMD64,		AFREEBSD,	elfcorefreebsdamd64,
 };
 
 int
@@ -202,13 +204,13 @@ err:
 }
 
 static int
-mapelf(Fhdr *fp, ulong base, Map *map, Regs **regs)
+mapelf(Fhdr *fp, u64int base, Map *map, Regs **regs)
 {
 	int i;
 	Elf *elf;
 	ElfProg *p;
-	ulong sz;
-	ulong lim;
+	u64int sz;
+	u64int lim;
 	Seg s;
 
 	elf = fp->elf;
diff --git a/src/libmach/crackmacho.c b/src/libmach/crackmacho.c
index bb521fad..77b0339b 100644
--- a/src/libmach/crackmacho.c
+++ b/src/libmach/crackmacho.c
@@ -3,7 +3,7 @@
 #include <mach.h>
 #include "macho.h"
 
-static int mapmacho(Fhdr *fp, ulong base, Map *map, Regs**);
+static int mapmacho(Fhdr *fp, u64int base, Map *map, Regs**);
 
 static struct
 {
@@ -136,7 +136,7 @@ err:
 }
 
 static int
-mapmacho(Fhdr *fp, ulong base, Map *map, Regs **rp)
+mapmacho(Fhdr *fp, u64int base, Map *map, Regs **rp)
 {
 	int i, n;
 	uchar *u;
diff --git a/src/libmach/elf.c b/src/libmach/elf.c
index 72c0bd3e..2459a291 100644
--- a/src/libmach/elf.c
+++ b/src/libmach/elf.c
@@ -13,6 +13,11 @@ typedef struct ElfSectBytes ElfSectBytes;
 typedef struct ElfProgBytes ElfProgBytes;
 typedef struct ElfSymBytes ElfSymBytes;
 
+typedef struct ElfHdrBytes64 ElfHdrBytes64;
+typedef struct ElfSectBytes64 ElfSectBytes64;
+typedef struct ElfProgBytes64 ElfProgBytes64;
+typedef struct ElfSymBytes64 ElfSymBytes64;
+
 struct ElfHdrBytes
 {
 	uchar	ident[16];
@@ -31,6 +36,24 @@ struct ElfHdrBytes
 	uchar	shstrndx[2];
 };
 
+struct ElfHdrBytes64
+{
+	uchar	ident[16];
+	uchar	type[2];
+	uchar	machine[2];
+	uchar	version[4];
+	uchar	entry[8];
+	uchar	phoff[8];
+	uchar	shoff[8];
+	uchar	flags[4];
+	uchar	ehsize[2];
+	uchar	phentsize[2];
+	uchar	phnum[2];
+	uchar	shentsize[2];
+	uchar	shnum[2];
+	uchar	shstrndx[2];
+};
+
 struct ElfSectBytes
 {
 	uchar	name[4];
@@ -45,6 +68,20 @@ struct ElfSectBytes
 	uchar	entsize[4];
 };
 
+struct ElfSectBytes64
+{
+	uchar	name[4];
+	uchar	type[4];
+	uchar	flags[8];
+	uchar	addr[8];
+	uchar	offset[8];
+	uchar	size[8];
+	uchar	link[4];
+	uchar	info[4];
+	uchar	align[8];
+	uchar	entsize[8];
+};
+
 struct ElfSymBytes
 {
 	uchar	name[4];
@@ -55,6 +92,16 @@ struct ElfSymBytes
 	uchar	shndx[2];
 };
 
+struct ElfSymBytes64
+{
+	uchar	name[4];
+	uchar	info;
+	uchar	other;
+	uchar	shndx[2];
+	uchar	value[8];
+	uchar	size[8];
+};
+
 struct ElfProgBytes
 {
 	uchar	type[4];
@@ -67,11 +114,23 @@ struct ElfProgBytes
 	uchar	align[4];
 };
 
+struct ElfProgBytes64
+{
+	uchar	type[4];
+	uchar	flags[4];
+	uchar	offset[8];
+	uchar	vaddr[8];
+	uchar	paddr[8];
+	uchar	filesz[8];
+	uchar	memsz[8];
+	uchar	align[8];
+};
+
 uchar ElfMagic[4] = { 0x7F, 'E', 'L', 'F' };
 
-static void	unpackhdr(ElfHdr*, ElfHdrBytes*);
-static void	unpackprog(ElfHdr*, ElfProg*, ElfProgBytes*);
-static void	unpacksect(ElfHdr*, ElfSect*, ElfSectBytes*);
+static void	unpackhdr(ElfHdr*, void*);
+static void	unpackprog(ElfHdr*, ElfProg*, void*);
+static void	unpacksect(ElfHdr*, ElfSect*, void*);
 
 static char *elftypes[] = {
 	"none",
@@ -128,9 +187,11 @@ elfinit(int fd)
 	int i;
 	Elf *e;
 	ElfHdr *h;
-	ElfHdrBytes hdrb;
-	ElfProgBytes progb;
-	ElfSectBytes sectb;
+	union {
+		ElfHdrBytes h32;
+		ElfHdrBytes64 h64;
+	} hdrb;
+	void *p;
 	ElfSect *s;
 
 	e = mallocz(sizeof(Elf), 1);
@@ -146,17 +207,17 @@ elfinit(int fd)
 		goto err;
 	h = &e->hdr;
 	unpackhdr(h, &hdrb);
-	if(h->class != ElfClass32){
-		werrstr("bad ELF class - not 32-bit");
+	if(h->class != ElfClass32 && h->class != ElfClass64){
+		werrstr("bad ELF class - not 32-bit, 64-bit");
 		goto err;
 	}
 	if(h->encoding != ElfDataLsb && h->encoding != ElfDataMsb){
 		werrstr("bad ELF encoding - not LSB, MSB");
 		goto err;
 	}
-	if(hdrb.ident[6] != h->version){
+	if(hdrb.h32.ident[6] != h->version){
 		werrstr("bad ELF encoding - version mismatch %02ux and %08ux",
-			(uint)hdrb.ident[6], (uint)h->version);
+			(uint)hdrb.h32.ident[6], (uint)h->version);
 		goto err;
 	}
 
@@ -165,23 +226,27 @@ elfinit(int fd)
 	 */
 	e->nprog = h->phnum;
 	e->prog = mallocz(sizeof(ElfProg)*e->nprog, 1);
+	p = mallocz(h->phentsize, 1);
 	for(i=0; i<e->nprog; i++){
 		if(seek(fd, h->phoff+i*h->phentsize, 0) < 0
-		|| readn(fd, &progb, sizeof progb) != sizeof progb)
+		|| readn(fd, p, h->phentsize) != h->phentsize)
 			goto err;
-		unpackprog(h, &e->prog[i], &progb);
+		unpackprog(h, &e->prog[i], p);
 	}
+	free(p);
 
 	e->nsect = h->shnum;
 	if(e->nsect == 0)
 		goto nosects;
 	e->sect = mallocz(sizeof(ElfSect)*e->nsect, 1);
+	p = mallocz(h->shentsize, 1);
 	for(i=0; i<e->nsect; i++){
 		if(seek(fd, h->shoff+i*h->shentsize, 0) < 0
-		|| readn(fd, &sectb, sizeof sectb) != sizeof sectb)
+		|| readn(fd, p, h->shentsize) != h->shentsize)
 			goto err;
-		unpacksect(h, &e->sect[i], &sectb);
+		unpacksect(h, &e->sect[i], p);
 	}
+	free(p);
 
 	if(h->shstrndx >= e->nsect){
 		fprint(2, "warning: bad string section index %d >= %d", h->shstrndx, e->nsect);
@@ -243,12 +308,15 @@ elfclose(Elf *elf)
 }
 
 static void
-unpackhdr(ElfHdr *h, ElfHdrBytes *b)
+unpackhdr(ElfHdr *h, void *v)
 {
 	u16int (*e2)(uchar*);
 	u32int (*e4)(uchar*);
 	u64int (*e8)(uchar*);
+	ElfHdrBytes *b;
+	ElfHdrBytes64 *b64;
 
+	b = v;
 	memmove(h->magic, b->ident, 4);
 	h->class = b->ident[4];
 	h->encoding = b->ident[5];
@@ -273,6 +341,9 @@ unpackhdr(ElfHdr *h, ElfHdrBytes *b)
 	h->e4 = e4;
 	h->e8 = e8;
 	
+	if(h->class == ElfClass64)
+		goto b64;
+
 	h->type = e2(b->type);
 	h->machine = e2(b->machine);
 	h->version = e4(b->version);
@@ -286,40 +357,100 @@ unpackhdr(ElfHdr *h, ElfHdrBytes *b)
 	h->shentsize = e2(b->shentsize);
 	h->shnum = e2(b->shnum);
 	h->shstrndx = e2(b->shstrndx);
+	return;
+
+b64:
+	b64 = v;
+	h->type = e2(b64->type);
+	h->machine = e2(b64->machine);
+	h->version = e4(b64->version);
+	h->entry = e8(b64->entry);
+	h->phoff = e8(b64->phoff);
+	h->shoff = e8(b64->shoff);
+	h->flags = e4(b64->flags);
+	h->ehsize = e2(b64->ehsize);
+	h->phentsize = e2(b64->phentsize);
+	h->phnum = e2(b64->phnum);
+	h->shentsize = e2(b64->shentsize);
+	h->shnum = e2(b64->shnum);
+	h->shstrndx = e2(b64->shstrndx);
+	return;
 }
 
 static void
-unpackprog(ElfHdr *h, ElfProg *p, ElfProgBytes *b)
+unpackprog(ElfHdr *h, ElfProg *p, void *v)
 {
 	u32int (*e4)(uchar*);
+	u64int (*e8)(uchar*);
 
-	e4 = h->e4;
-	p->type = e4(b->type);
-	p->offset = e4(b->offset);
-	p->vaddr = e4(b->vaddr);
-	p->paddr = e4(b->paddr);
-	p->filesz = e4(b->filesz);
-	p->memsz = e4(b->memsz);
-	p->flags = e4(b->flags);
-	p->align = e4(b->align);
+	if(h->class == ElfClass32) {
+		ElfProgBytes *b;
+		
+		b = v;
+		e4 = h->e4;
+		p->type = e4(b->type);
+		p->offset = e4(b->offset);
+		p->vaddr = e4(b->vaddr);
+		p->paddr = e4(b->paddr);
+		p->filesz = e4(b->filesz);
+		p->memsz = e4(b->memsz);
+		p->flags = e4(b->flags);
+		p->align = e4(b->align);
+	} else {
+		ElfProgBytes64 *b;
+		
+		b = v;
+		e4 = h->e4;
+		e8 = h->e8;
+		p->type = e4(b->type);
+		p->offset = e8(b->offset);
+		p->vaddr = e8(b->vaddr);
+		p->paddr = e8(b->paddr);
+		p->filesz = e8(b->filesz);
+		p->memsz = e8(b->memsz);
+		p->flags = e4(b->flags);
+		p->align = e8(b->align);
+	}
 }
 
 static void
-unpacksect(ElfHdr *h, ElfSect *s, ElfSectBytes *b)
+unpacksect(ElfHdr *h, ElfSect *s, void *v)
 {
 	u32int (*e4)(uchar*);
+	u64int (*e8)(uchar*);
 
-	e4 = h->e4;
-	s->name = (char*)(uintptr)e4(b->name);
-	s->type = e4(b->type);
-	s->flags = e4(b->flags);
-	s->addr = e4(b->addr);
-	s->offset = e4(b->offset);
-	s->size = e4(b->size);
-	s->link = e4(b->link);
-	s->info = e4(b->info);
-	s->align = e4(b->align);
-	s->entsize = e4(b->entsize);
+	if(h->class == ElfClass32) {
+		ElfSectBytes *b;
+		
+		b = v;
+		e4 = h->e4;
+		s->name = (char*)(uintptr)e4(b->name);
+		s->type = e4(b->type);
+		s->flags = e4(b->flags);
+		s->addr = e4(b->addr);
+		s->offset = e4(b->offset);
+		s->size = e4(b->size);
+		s->link = e4(b->link);
+		s->info = e4(b->info);
+		s->align = e4(b->align);
+		s->entsize = e4(b->entsize);
+	} else {
+		ElfSectBytes64 *b;
+		
+		b = v;
+		e4 = h->e4;
+		e8 = h->e8;
+		s->name = (char*)(uintptr)e4(b->name);
+		s->type = e4(b->type);
+		s->flags = e8(b->flags);
+		s->addr = e8(b->addr);
+		s->offset = e8(b->offset);
+		s->size = e8(b->size);
+		s->link = e4(b->link);
+		s->info = e4(b->info);
+		s->align = e8(b->align);
+		s->entsize = e8(b->entsize);
+	}
 }
 
 ElfSect*
@@ -374,21 +505,39 @@ elfsym(Elf *elf, int i, ElfSym *sym)
 	extract:
 		if(elfmap(elf, symtab) < 0 || elfmap(elf, strtab) < 0)
 			return -1;
-		p = symtab->base + i * sizeof(ElfSymBytes);
-		s = (char*)strtab->base;
-		x = elf->hdr.e4(p);
-		if(x >= strtab->size){
-			werrstr("bad symbol name offset 0x%lux", x);
-			return -1;
+		if(elf->hdr.class == ElfClass32) {
+			p = symtab->base + i * sizeof(ElfSymBytes);
+			s = (char*)strtab->base;
+			x = elf->hdr.e4(p);
+			if(x >= strtab->size){
+				werrstr("bad symbol name offset 0x%lux", x);
+				return -1;
+			}
+			sym->name = s + x;
+			sym->value = elf->hdr.e4(p+4);
+			sym->size = elf->hdr.e4(p+8);
+			x = p[12];
+			sym->bind = x>>4;
+			sym->type = x & 0xF;
+			sym->other = p[13];
+			sym->shndx = elf->hdr.e2(p+14);
+		} else {
+			p = symtab->base + i * sizeof(ElfSymBytes64);
+			s = (char*)strtab->base;
+			x = elf->hdr.e4(p);
+			if(x >= strtab->size){
+				werrstr("bad symbol name offset 0x%lux", x);
+				return -1;
+			}
+			sym->name = s + x;
+			x = p[4];
+			sym->bind = x>>4;
+			sym->type = x & 0xF;
+			sym->other = p[5];
+			sym->shndx = elf->hdr.e2(p+6);
+			sym->value = elf->hdr.e8(p+8);
+			sym->size = elf->hdr.e8(p+16);
 		}
-		sym->name = s + x;
-		sym->value = elf->hdr.e4(p+4);
-		sym->size = elf->hdr.e4(p+8);
-		x = p[12];
-		sym->bind = x>>4;
-		sym->type = x & 0xF;
-		sym->other = p[13];
-		sym->shndx = elf->hdr.e2(p+14);
 		return 0;
 	}
 	i -= elf->nsymtab;
diff --git a/src/libmach/elf.h b/src/libmach/elf.h
index 8ba234e0..cda2f807 100644
--- a/src/libmach/elf.h
+++ b/src/libmach/elf.h
@@ -54,6 +54,7 @@ enum
 	ElfMachAlpha,		/* Digital Alpha */
 	ElfMachSH,		/* Hitachi SH */
 	ElfMachSparc9,		/* SPARC V9 */
+	ElfMachAmd64 = 62,	/* x86-64 */
 	/* and the list goes on... */
 
 	ElfAbiNone = 0,
@@ -138,9 +139,9 @@ struct ElfHdr
 	uchar	abiversion;
 	u32int	type;
 	u32int	machine;
-	u32int	entry;
-	u32int	phoff;
-	u32int	shoff;
+	u64int	entry;
+	u64int	phoff;
+	u64int	shoff;
 	u32int	flags;
 	u32int	ehsize;
 	u32int	phentsize;
@@ -157,27 +158,27 @@ struct ElfSect
 {
 	char		*name;
 	u32int	type;
-	u32int	flags;
-	u32int	addr;
-	u32int	offset;
-	u32int	size;
+	u64int	flags;
+	u64int	addr;
+	u64int	offset;
+	u64int	size;
 	u32int	link;
 	u32int	info;
-	u32int	align;
-	u32int	entsize;
+	u64int	align;
+	u64int	entsize;
 	uchar	*base;
 };
 
 struct ElfProg
 {
 	u32int	type;
-	u32int	offset;
-	u32int	vaddr;
-	u32int	paddr;
-	u32int	filesz;
-	u32int	memsz;
+	u64int	offset;
+	u64int	vaddr;
+	u64int	paddr;
+	u64int	filesz;
+	u64int	memsz;
 	u32int	flags;
-	u32int	align;
+	u64int	align;
 };
 
 struct ElfNote
@@ -193,8 +194,8 @@ struct ElfNote
 struct ElfSym
 {
 	char*	name;
-	u32int	value;
-	u32int	size;
+	u64int	value;
+	u64int	size;
 	uchar	bind;
 	uchar	type;
 	uchar	other;
@@ -234,4 +235,6 @@ int	elfmap(Elf*, ElfSect*);
 
 struct Fhdr;
 void	elfcorelinux386(struct Fhdr*, Elf*, ElfNote*);
+void	elfcorefreebsd386(struct Fhdr*, Elf*, ElfNote*);
+void	elfcorefreebsdamd64(struct Fhdr*, Elf*, ElfNote*);
 void	elfdl386mapdl(int);
diff --git a/src/libmach/elfcorefreebsdamd64.c b/src/libmach/elfcorefreebsdamd64.c
new file mode 100644
index 00000000..aefed432
--- /dev/null
+++ b/src/libmach/elfcorefreebsdamd64.c
@@ -0,0 +1,150 @@
+#include <u.h>
+#include <libc.h>
+#include <mach.h>
+#include "elf.h"
+#include "uregamd64.h"
+
+typedef struct Ureg Ureg;
+
+// See FreeBSD's sys/procfs.h.
+
+typedef struct Lreg Lreg;
+typedef struct Status Status;
+typedef struct Psinfo Psinfo;
+
+struct Lreg
+{
+	u64int	r15;
+	u64int	r14;
+	u64int	r13;
+	u64int	r12;
+	u64int	r11;
+	u64int	r10;
+	u64int	r9;
+	u64int	r8;
+	u64int	rdi;
+	u64int	rsi;
+	u64int	rbp;
+	u64int	rbx;
+	u64int	rdx;
+	u64int	rcx;
+	u64int	rax;
+	u32int	trapno;
+	u16int	fs;
+	u16int	gs;
+	u32int	err;
+	u16int	es;
+	u16int	ds;
+	u64int	rip;
+	u64int	cs;
+	u64int	rflags;
+	u64int	rsp;
+	u64int	ss;
+};
+
+struct Status
+{
+	u32int		version;	/* Version number of struct (1) */
+	u64int		statussz;	/* sizeof(prstatus_t) (1) */
+	u64int		gregsetsz;	/* sizeof(gregset_t) (1) */
+	u64int		fpregsetsz;	/* sizeof(fpregset_t) (1) */
+	u32int		osreldate;	/* Kernel version (1) */
+	u32int		cursig;	/* Current signal (1) */
+	u32int		pid;		/* Process ID (1) */
+	Lreg		reg;		/* General purpose registers (1) */
+};
+
+struct Psinfo
+{
+	u32int	version;
+	u64int	size;
+	char	name[17];
+	char	psargs[81];
+};
+
+void
+elfcorefreebsdamd64(Fhdr *fp, Elf *elf, ElfNote *note)
+{
+	Status *s;
+	Lreg *l;
+	Ureg *u;
+	int i;
+
+	switch(note->type) {
+	case ElfNotePrStatus:
+		if(note->descsz < sizeof(Status)){
+			fprint(2, "warning: elf status note too small\n");
+			break;
+		}
+		s = (Status*)note->desc;
+		if(s->version != 1){
+			fprint(2, "warning: unknown elf note status version %ud\n", (uint)s->version);
+			break;
+		}
+		l = &s->reg;
+		u = malloc(sizeof(Ureg));
+	
+		/* no byte order problems - just copying and rearranging */
+		u->ax = l->rax;
+		u->bx = l->rbx;
+		u->cx = l->rcx;
+		u->dx = l->rdx;
+		u->si = l->rsi;
+		u->di = l->rdi;
+		u->bp = l->rbp;
+		u->r8 = l->r8;
+		u->r9 = l->r9;
+		u->r10 = l->r10;
+		u->r11 = l->r11;
+		u->r12 = l->r12;
+		u->r13 = l->r13;
+		u->r14 = l->r14;
+		u->r15 = l->r15;
+		
+		u->ds = l->ds;
+		u->es = l->es;
+		u->fs = l->fs;
+		u->gs = l->gs;
+		
+		u->type = l->trapno;
+		u->error = l->err;
+		u->ip = l->rip;
+		u->cs = l->cs;
+		u->flags = l->rflags;
+		u->sp = l->rsp;
+		u->ss = l->ss;
+		
+		if((fp->thread = realloc(fp->thread, (1+fp->nthread)*sizeof(fp->thread[0]))) == nil){
+			fprint(2, "warning: out of memory saving thread info\n");
+			return;
+		}
+		i = fp->nthread;
+		fp->thread[i].id = s->pid;
+		fp->thread[i].ureg = u;
+		fp->nthread++;
+		break;
+	}
+}
+
+int
+corecmdfreebsd386(Elf *elf, ElfNote *note, char **pp)
+{
+	char *t;
+	Psinfo *p;
+
+	*pp = nil;
+	if(note->descsz < sizeof(Psinfo)){
+		werrstr("elf psinfo note too small");
+		return -1;
+	}
+	p = (Psinfo*)note->desc;
+	/* print("elf name %s\nelf args %s\n", p->name, p->psargs); */
+	t = malloc(80+1);
+	if(t == nil)
+		return -1;
+	memmove(t, p->psargs, 80);
+	t[80] = 0;
+	*pp = t;
+	return 0;
+}
+
diff --git a/src/libmach/frame.c b/src/libmach/frame.c
index 7d03f3b4..2b7f8b30 100644
--- a/src/libmach/frame.c
+++ b/src/libmach/frame.c
@@ -9,11 +9,11 @@ struct LocRegs
 	Regs r;
 	Regs *oldregs;
 	Map *map;
-	ulong *val;
+	u64int *val;
 };
 
 static int
-locregrw(Regs *regs, char *name, ulong *val, int isr)
+locregrw(Regs *regs, char *name, u64int *val, int isr)
 {
 	int i;
 	LocRegs *lr;
@@ -36,8 +36,8 @@ stacktrace(Map *map, Regs *regs, Tracer trace)
 {
 	char *rname;
 	int i, ipc, ret;
-	ulong nextpc, pc, v;
-	ulong *cur, *next;
+	u64int nextpc, pc, v;
+	u64int *cur, *next;
 	LocRegs lr;
 	Symbol s, *sp;
 
diff --git a/src/libmach/hexify.c b/src/libmach/hexify.c
index 5f3ed50e..b095e8ff 100644
--- a/src/libmach/hexify.c
+++ b/src/libmach/hexify.c
@@ -4,7 +4,7 @@
 #include <mach.h>
 
 char *
-_hexify(char *buf, ulong p, int zeros)
+_hexify(char *buf, u64int p, int zeros)
 {
 	ulong d;
 
diff --git a/src/libmach/loc.c b/src/libmach/loc.c
index 8ba9481f..9d5dc857 100644
--- a/src/libmach/loc.c
+++ b/src/libmach/loc.c
@@ -70,7 +70,7 @@ lget1(Map *map, Regs *regs, Loc loc, uchar *a, uint n)
 int
 lget2(Map *map, Regs *regs, Loc loc, u16int *u)
 {
-	ulong ul;
+	u64int ul;
 
 	if(locsimplify(map, regs, loc, &loc) < 0)
 		return -1;
@@ -93,7 +93,7 @@ lget2(Map *map, Regs *regs, Loc loc, u16int *u)
 int
 lget4(Map *map, Regs *regs, Loc loc, u32int *u)
 {
-	ulong ul;
+	u64int ul;
 
 	if(locsimplify(map, regs, loc, &loc) < 0)
 		return -1;
@@ -114,9 +114,22 @@ lget4(Map *map, Regs *regs, Loc loc, u32int *u)
 }
 
 int
+lgeta(Map *map, Regs *regs, Loc loc, u64int *u)
+{
+	u32int v;
+
+	if(machcpu == &machamd64)
+		return lget8(map, regs, loc, u);
+	if(lget4(map, regs, loc, &v) < 0)
+		return -1;
+	*u = v;
+	return 4;
+}
+
+int
 lget8(Map *map, Regs *regs, Loc loc, u64int *u)
 {
-	ulong ul;
+	u64int ul;
 
 	if(locsimplify(map, regs, loc, &loc) < 0)
 		return -1;
@@ -190,7 +203,7 @@ lput8(Map *map, Regs *regs, Loc loc, u64int u)
 static Loc zl;
 
 Loc
-locaddr(ulong addr)
+locaddr(u64int addr)
 {
 	Loc l;
 
@@ -214,7 +227,7 @@ locindir(char *reg, long offset)
 }
 
 Loc
-locconst(ulong con)
+locconst(u64int con)
 {
 	Loc l;
 
@@ -248,7 +261,7 @@ locreg(char *reg)
 int
 locsimplify(Map *map, Regs *regs, Loc loc, Loc *newloc)
 {
-	ulong u;
+	u64int u;
 
 	if(loc.type == LOFFSET){
 		if(rget(regs, loc.reg, &u) < 0)
diff --git a/src/libmach/localaddr.c b/src/libmach/localaddr.c
index 800c0f66..8189537f 100644
--- a/src/libmach/localaddr.c
+++ b/src/libmach/localaddr.c
@@ -18,9 +18,9 @@ static struct {
 } rock;
 
 static int
-ltrace(Map *map, Regs *regs, ulong pc, ulong nextpc, Symbol *sym, int depth)
+ltrace(Map *map, Regs *regs, u64int pc, u64int nextpc, Symbol *sym, int depth)
 {
-	ulong v;
+	u64int v;
 	Symbol s1;
 
 	USED(pc);
@@ -49,7 +49,7 @@ ltrace(Map *map, Regs *regs, ulong pc, ulong nextpc, Symbol *sym, int depth)
 }
 
 int
-localaddr(Map *map, Regs *regs, char *fn, char *var, ulong *val)
+localaddr(Map *map, Regs *regs, char *fn, char *var, u64int *val)
 {
 	Regdesc *rp;
 
diff --git a/src/libmach/mach386.c b/src/libmach/mach386.c
index 1f756abf..3b39d697 100644
--- a/src/libmach/mach386.c
+++ b/src/libmach/mach386.c
@@ -18,17 +18,17 @@
  * i386-specific debugger interface
  */
 
-static	char	*i386excep(Map*, Regs*);
+	char	*i386excep(Map*, Regs*);
 
 /*
 static	int	i386trace(Map*, ulong, ulong, ulong, Tracer);
 static	ulong	i386frame(Map*, ulong, ulong, ulong, ulong);
 */
-static	int	i386foll(Map*, Regs*, ulong, ulong*);
-static	int	i386hexinst(Map*, ulong, char*, int);
-static	int	i386das(Map*, ulong, char, char*, int);
-static	int	i386instlen(Map*, ulong);
-static	int	i386unwind(Map*, Regs*, ulong*, Symbol*);
+	int	i386foll(Map*, Regs*, u64int, u64int*);
+	int	i386hexinst(Map*, u64int, char*, int);
+	int	i386das(Map*, u64int, char, char*, int);
+	int	i386instlen(Map*, u64int);
+	int	i386unwind(Map*, Regs*, u64int*, Symbol*);
 
 static char *i386windregs[] = {
 	"PC",
@@ -136,7 +136,7 @@ Mach mach386 =
 static void
 syscallhack(Map *map, Regs *regs, int *spoff)
 {
-	ulong pc;
+	u64int pc;
 	char buf[60];
 
 	rget(regs, "PC", &pc);
@@ -149,8 +149,8 @@ syscallhack(Map *map, Regs *regs, int *spoff)
 	*spoff += 4;	
 }
 
-static int
-i386unwind(Map *map, Regs *regs, ulong *next, Symbol *sym)
+int
+i386unwind(Map *map, Regs *regs, u64int *next, Symbol *sym)
 {
 	int i, isp, ipc, ibp, havebp, n, spoff, off[9];
 	ulong pc;
@@ -285,11 +285,11 @@ static char *excname[] =
 	"system call",			/* 64 */
 };
 
-static char*
+char*
 i386excep(Map *map, Regs *regs)
 {
-	ulong c;
-	ulong pc;
+	u64int c;
+	u64int pc;
 	static char buf[16];
 
 	if(rget(regs, "TRAP", &c) < 0)
@@ -317,22 +317,27 @@ typedef struct Instr Instr;
 struct	Instr
 {
 	uchar	mem[1+1+1+1+2+1+1+4+4];		/* raw instruction */
-	ulong	addr;		/* address of start of instruction */
+	uvlong	addr;		/* address of start of instruction */
 	int	n;		/* number of bytes in instruction */
 	char	*prefix;	/* instr prefix */
 	char	*segment;	/* segment override */
 	uchar	jumptype;	/* set to the operand type for jump/ret/call */
-	char	osize;		/* 'W' or 'L' */
-	char	asize;		/* address size 'W' or 'L' */
+	uchar	amd64;
+	uchar	rex;		/* REX prefix (or zero) */
+	char	osize;		/* 'W' or 'L' (or 'Q' on amd64) */
+	char	asize;		/* address size 'W' or 'L' (or 'Q' or amd64) */
 	uchar	mod;		/* bits 6-7 of mod r/m field */
 	uchar	reg;		/* bits 3-5 of mod r/m field */
-	schar	ss;		/* bits 6-7 of SIB */
+	char	ss;		/* bits 6-7 of SIB */
 	schar	index;		/* bits 3-5 of SIB */
 	schar	base;		/* bits 0-2 of SIB */
+	char	rip;		/* RIP-relative in amd64 mode */
+	uchar	opre;		/* f2/f3 could introduce media */
 	short	seg;		/* segment of far address */
-	ulong	disp;		/* displacement */
-	ulong 	imm;		/* immediate */
-	ulong 	imm2;		/* second immediate operand */
+	uint32	disp;		/* displacement */
+	uint32 	imm;		/* immediate */
+	uint32 	imm2;		/* second immediate operand */
+	uvlong	imm64;		/* big immediate */
 	char	*curr;		/* fill level in output buffer */
 	char	*end;		/* end of output buffer */
 	char	*err;		/* error message */
@@ -347,8 +352,28 @@ enum{
 	SP,
 	BP,
 	SI,
-	DI
+	DI,
+
+	/* amd64 */
+	/* be careful: some unix system headers #define R8, R9, etc */
+	AMD64_R8,
+	AMD64_R9,
+	AMD64_R10,
+	AMD64_R11,
+	AMD64_R12,
+	AMD64_R13,
+	AMD64_R14,
+	AMD64_R15
+};
+
+	/* amd64 rex extension byte */
+enum{
+	REXW		= 1<<3,	/* =1, 64-bit operand size */
+	REXR		= 1<<2,	/* extend modrm reg */
+	REXX		= 1<<1,	/* extend sib index */
+	REXB		= 1<<0	/* extend modrm r/m, sib base, or opcode reg */
 };
+
 	/* Operand Format codes */
 /*
 %A	-	address size register modifier (!asize -> 'E')
@@ -358,7 +383,7 @@ enum{
 %O	-	Operand size register modifier (!osize -> 'E')
 %T	-	Test register TR6/TR7
 %S	-	size code ('W' or 'L')
-%X	-	Weird opcode: OSIZE == 'W' => "CBW"; else => "CWDE"
+%W	-	Weird opcode: OSIZE == 'W' => "CBW"; else => "CWDE"
 %d	-	displacement 16-32 bits
 %e	-	effective address - Mod R/M value
 %f	-	floating point register F0-F7 - from Mod R/M register
@@ -366,7 +391,7 @@ enum{
 %i	-	immediate operand 8-32 bits
 %p	-	PC-relative - signed displacement in immediate field
 %r	-	Reg from Mod R/M
-%x	-	Weird opcode: OSIZE == 'W' => "CWD"; else => "CDQ"
+%w	-	Weird opcode: OSIZE == 'W' => "CWD"; else => "CDQ"
 */
 
 typedef struct Optable Optable;
@@ -383,16 +408,17 @@ enum {
 	Iw,			/* 16-bit immediate -> imm */
 	Iw2,			/* 16-bit immediate -> imm2 */
 	Iwd,			/* Operand-sized immediate (no sign extension)*/
+	Iwdq,			/* Operand-sized immediate, possibly 64 bits */
 	Awd,			/* Address offset */
 	Iwds,			/* Operand-sized immediate (sign extended) */
-	RM,			/* Word or long R/M field with register (/r) */
+	RM,			/* Word or int32 R/M field with register (/r) */
 	RMB,			/* Byte R/M field with register (/r) */
-	RMOP,			/* Word or long R/M field with op code (/digit) */
+	RMOP,			/* Word or int32 R/M field with op code (/digit) */
 	RMOPB,			/* Byte R/M field with op code (/digit) */
 	RMR,			/* R/M register only (mod = 11) */
 	RMM,			/* R/M memory only (mod = 0/1/2) */
-	R0,			/* Base reg of Mod R/M is literal 0x00 */
-	R1,			/* Base reg of Mod R/M is literal 0x01 */
+	Op_R0,			/* Base reg of Mod R/M is literal 0x00 */
+	Op_R1,			/* Base reg of Mod R/M is literal 0x01 */
 	FRMOP,			/* Floating point R/M field with opcode */
 	FRMEX,			/* Extended floating point R/M field with opcode */
 	JUMP,			/* Jump or Call flag - no operand */
@@ -400,370 +426,513 @@ enum {
 	OA,			/* literal 0x0a byte */
 	PTR,			/* Seg:Displacement addr (ptr16:16 or ptr16:32) */
 	AUX,			/* Multi-byte op code - Auxiliary table */
+	AUXMM,			/* multi-byte op code - auxiliary table chosen by prefix */
 	PRE,			/* Instr Prefix */
+	OPRE,			/* Instr Prefix or media op extension */
 	SEG,			/* Segment Prefix */
 	OPOVER,			/* Operand size override */
-	ADDOVER		/* Address size override */
+	ADDOVER,		/* Address size override */
 };
-	
+
 static Optable optab0F00[8]=
 {
-	0,0,		"MOVW	LDT,%e",	/* 0x00 */
-	0,0,		"MOVW	TR,%e",		/* 0x01 */
-	0,0,		"MOVW	%e,LDT",	/* 0x02 */
-	0,0,		"MOVW	%e,TR",		/* 0x03 */
-	0,0,		"VERR	%e",		/* 0x04 */
-	0,0,		"VERW	%e",		/* 0x05 */
+[0x00] =	{ 0,0,		"MOVW	LDT,%e" },
+[0x01] =	{ 0,0,		"MOVW	TR,%e" },
+[0x02] =	{ 0,0,		"MOVW	%e,LDT" },
+[0x03] =	{ 0,0,		"MOVW	%e,TR" },
+[0x04] =	{ 0,0,		"VERR	%e" },
+[0x05] =	{ 0,0,		"VERW	%e" },
 };
 
 static Optable optab0F01[8]=
 {
-	0,0,		"MOVL	GDTR,%e",	/* 0x00 */
-	0,0,		"MOVL	IDTR,%e",	/* 0x01 */
-	0,0,		"MOVL	%e,GDTR",	/* 0x02 */
-	0,0,		"MOVL	%e,IDTR",	/* 0x03 */
-	0,0,		"MOVW	MSW,%e",	/* 0x04 */	/* word */
-	0,0,		"",			/* 0x05 */
-	0,0,		"MOVW	%e,MSW",	/* 0x06 */	/* word */
+[0x00] =	{ 0,0,		"MOVL	GDTR,%e" },
+[0x01] =	{ 0,0,		"MOVL	IDTR,%e" },
+[0x02] =	{ 0,0,		"MOVL	%e,GDTR" },
+[0x03] =	{ 0,0,		"MOVL	%e,IDTR" },
+[0x04] =	{ 0,0,		"MOVW	MSW,%e" },	/* word */
+[0x06] =	{ 0,0,		"MOVW	%e,MSW" },	/* word */
+[0x07] =	{ 0,0,		"INVLPG	%e" },		/* or SWAPGS */
+};
+
+static Optable optab0F01F8[1]=
+{
+[0x00] =	{ 0,0,		"SWAPGS" },
+};
+
+/* 0F71 */
+/* 0F72 */
+/* 0F73 */
+
+static Optable optab0FAE[8]=
+{
+[0x00] =	{ 0,0,		"FXSAVE	%e" },
+[0x01] =	{ 0,0,		"FXRSTOR	%e" },
+[0x02] =	{ 0,0,		"LDMXCSR	%e" },
+[0x03] =	{ 0,0,		"STMXCSR	%e" },
+[0x05] =	{ 0,0,		"LFENCE" },
+[0x06] =	{ 0,0,		"MFENCE" },
+[0x07] =	{ 0,0,		"SFENCE" },
 };
 
+/* 0F18 */
+/* 0F0D */
+
 static Optable optab0FBA[8]=
 {
-	0,0,		"",			/* 0x00 */
-	0,0,		"",			/* 0x01 */
-	0,0,		"",			/* 0x02 */
-	0,0,		"",			/* 0x03 */
-	Ib,0,		"BT%S	%i,%e",		/* 0x04 */
-	Ib,0,		"BTS%S	%i,%e",		/* 0x05 */
-	Ib,0,		"BTR%S	%i,%e",		/* 0x06 */
-	Ib,0,		"BTC%S	%i,%e",		/* 0x07 */
+[0x04] =	{ Ib,0,		"BT%S	%i,%e" },
+[0x05] =	{ Ib,0,		"BTS%S	%i,%e" },
+[0x06] =	{ Ib,0,		"BTR%S	%i,%e" },
+[0x07] =	{ Ib,0,		"BTC%S	%i,%e" },
+};
+
+static Optable optab0F0F[256]=
+{
+[0x0c] =	{ 0,0,		"PI2FW	%m,%M" },
+[0x0d] =	{ 0,0,		"PI2L	%m,%M" },
+[0x1c] =	{ 0,0,		"PF2IW	%m,%M" },
+[0x1d] =	{ 0,0,		"PF2IL	%m,%M" },
+[0x8a] =	{ 0,0,		"PFNACC	%m,%M" },
+[0x8e] =	{ 0,0,		"PFPNACC	%m,%M" },
+[0x90] =	{ 0,0,		"PFCMPGE	%m,%M" },
+[0x94] =	{ 0,0,		"PFMIN	%m,%M" },
+[0x96] =	{ 0,0,		"PFRCP	%m,%M" },
+[0x97] =	{ 0,0,		"PFRSQRT	%m,%M" },
+[0x9a] =	{ 0,0,		"PFSUB	%m,%M" },
+[0x9e] =	{ 0,0,		"PFADD	%m,%M" },
+[0xa0] =	{ 0,0,		"PFCMPGT	%m,%M" },
+[0xa4] =	{ 0,0,		"PFMAX	%m,%M" },
+[0xa6] =	{ 0,0,		"PFRCPIT1	%m,%M" },
+[0xa7] =	{ 0,0,		"PFRSQIT1	%m,%M" },
+[0xaa] =	{ 0,0,		"PFSUBR	%m,%M" },
+[0xae] =	{ 0,0,		"PFACC	%m,%M" },
+[0xb0] =	{ 0,0,		"PFCMPEQ	%m,%M" },
+[0xb4] =	{ 0,0,		"PFMUL	%m,%M" },
+[0xb6] =	{ 0,0,		"PFRCPI2T	%m,%M" },
+[0xb7] =	{ 0,0,		"PMULHRW	%m,%M" },
+[0xbb] =	{ 0,0,		"PSWAPL	%m,%M" },
+};
+
+static Optable optab0FC7[8]=
+{
+[0x01] =	{ 0,0,		"CMPXCHG8B	%e" },
+};
+
+static Optable optab660F71[8]=
+{
+[0x02] =	{ Ib,0,		"PSRLW	%i,%X" },
+[0x04] =	{ Ib,0,		"PSRAW	%i,%X" },
+[0x06] =	{ Ib,0,		"PSLLW	%i,%X" },
+};
+
+static Optable optab660F72[8]=
+{
+[0x02] =	{ Ib,0,		"PSRLL	%i,%X" },
+[0x04] =	{ Ib,0,		"PSRAL	%i,%X" },
+[0x06] =	{ Ib,0,		"PSLLL	%i,%X" },
+};
+
+static Optable optab660F73[8]=
+{
+[0x02] =	{ Ib,0,		"PSRLQ	%i,%X" },
+[0x03] =	{ Ib,0,		"PSRLO	%i,%X" },
+[0x06] =	{ Ib,0,		"PSLLQ	%i,%X" },
+[0x07] =	{ Ib,0,		"PSLLO	%i,%X" },
+};
+
+static Optable optab660F[256]=
+{
+[0x2B] =	{ RM,0,		"MOVNTPD	%x,%e" },
+[0x2E] =	{ RM,0,		"UCOMISD	%x,%X" },
+[0x2F] =	{ RM,0,		"COMISD	%x,%X" },
+[0x5A] =	{ RM,0,		"CVTPD2PS	%x,%X" },
+[0x5B] =	{ RM,0,		"CVTPS2PL	%x,%X" },
+[0x6A] =	{ RM,0,		"PUNPCKHLQ %x,%X" },
+[0x6B] =	{ RM,0,		"PACKSSLW %x,%X" },
+[0x6C] =	{ RM,0,		"PUNPCKLQDQ %x,%X" },
+[0x6D] =	{ RM,0,		"PUNPCKHQDQ %x,%X" },
+[0x6E] =	{ RM,0,		"MOV%S	%e,%X" },
+[0x6F] =	{ RM,0,		"MOVO	%x,%X" },		/* MOVDQA */
+[0x70] =	{ RM,Ib,		"PSHUFL	%i,%x,%X" },
+[0x71] =	{ RMOP,0,		optab660F71 },
+[0x72] =	{ RMOP,0,		optab660F72 },
+[0x73] =	{ RMOP,0,		optab660F73 },
+[0x7E] =	{ RM,0,		"MOV%S	%X,%e" },
+[0x7F] =	{ RM,0,		"MOVO	%X,%x" },
+[0xC4] =	{ RM,Ib,		"PINSRW	%i,%e,%X" },
+[0xC5] =	{ RMR,Ib,		"PEXTRW	%i,%X,%e" },
+[0xD4] =	{ RM,0,		"PADDQ	%x,%X" },
+[0xD5] =	{ RM,0,		"PMULLW	%x,%X" },
+[0xD6] =	{ RM,0,		"MOVQ	%X,%x" },
+[0xE6] =	{ RM,0,		"CVTTPD2PL	%x,%X" },
+[0xE7] =	{ RM,0,		"MOVNTO	%X,%e" },
+[0xF7] =	{ RM,0,		"MASKMOVOU	%x,%X" },
+};
+
+static Optable optabF20F[256]=
+{
+[0x10] =	{ RM,0,		"MOVSD	%x,%X" },
+[0x11] =	{ RM,0,		"MOVSD	%X,%x" },
+[0x2A] =	{ RM,0,		"CVTS%S2SD	%e,%X" },
+[0x2C] =	{ RM,0,		"CVTTSD2S%S	%x,%r" },
+[0x2D] =	{ RM,0,		"CVTSD2S%S	%x,%r" },
+[0x5A] =	{ RM,0,		"CVTSD2SS	%x,%X" },
+[0x6F] =	{ RM,0,		"MOVOU	%x,%X" },
+[0x70] =	{ RM,Ib,		"PSHUFLW	%i,%x,%X" },
+[0x7F] =	{ RM,0,		"MOVOU	%X,%x" },
+[0xD6] =	{ RM,0,		"MOVQOZX	%M,%X" },
+[0xE6] =	{ RM,0,		"CVTPD2PL	%x,%X" },
+};
+
+static Optable optabF30F[256]=
+{
+[0x10] =	{ RM,0,		"MOVSS	%x,%X" },
+[0x11] =	{ RM,0,		"MOVSS	%X,%x" },
+[0x2A] =	{ RM,0,		"CVTS%S2SS	%e,%X" },
+[0x2C] =	{ RM,0,		"CVTTSS2S%S	%x,%r" },
+[0x2D] =	{ RM,0,		"CVTSS2S%S	%x,%r" },
+[0x5A] =	{ RM,0,		"CVTSS2SD	%x,%X" },
+[0x5B] =	{ RM,0,		"CVTTPS2PL	%x,%X" },
+[0x6F] =	{ RM,0,		"MOVOU	%x,%X" },
+[0x70] =	{ RM,Ib,		"PSHUFHW	%i,%x,%X" },
+[0x7E] =	{ RM,0,		"MOVQOZX	%x,%X" },
+[0x7F] =	{ RM,0,		"MOVOU	%X,%x" },
+[0xD6] =	{ RM,0,		"MOVQOZX	%m*,%X" },
+[0xE6] =	{ RM,0,		"CVTPL2PD	%x,%X" },
 };
 
 static Optable optab0F[256]=
 {
-	RMOP,0,		optab0F00,		/* 0x00 */
-	RMOP,0,		optab0F01,		/* 0x01 */
-	RM,0,		"LAR	%e,%r",		/* 0x02 */
-	RM,0,		"LSL	%e,%r",		/* 0x03 */
-	0,0,		"",			/* 0x04 */
-	0,0,		"",			/* 0x05 */
-	0,0,		"CLTS",			/* 0x06 */
-	0,0,		"",			/* 0x07 */
-	0,0,		"INVD",			/* 0x08 */
-	0,0,		"WBINVD",		/* 0x09 */
-	0,0,		"",			/* 0x0a */
-	0,0,		"",			/* 0x0b */
-	0,0,		"",			/* 0x0c */
-	0,0,		"",			/* 0x0d */
-	0,0,		"",			/* 0x0e */
-	0,0,		"",			/* 0x0f */
-	0,0,		"",			/* 0x10 */
-	0,0,		"",			/* 0x11 */
-	0,0,		"",			/* 0x12 */
-	0,0,		"",			/* 0x13 */
-	0,0,		"",			/* 0x14 */
-	0,0,		"",			/* 0x15 */
-	0,0,		"",			/* 0x16 */
-	0,0,		"",			/* 0x17 */
-	0,0,		"",			/* 0x18 */
-	0,0,		"",			/* 0x19 */
-	0,0,		"",			/* 0x1a */
-	0,0,		"",			/* 0x1b */
-	0,0,		"",			/* 0x1c */
-	0,0,		"",			/* 0x1d */
-	0,0,		"",			/* 0x1e */
-	0,0,		"",			/* 0x1f */
-	RMR,0,		"MOVL	%C,%e",		/* 0x20 */
-	RMR,0,		"MOVL	%D,%e",		/* 0x21 */
-	RMR,0,		"MOVL	%e,%C",		/* 0x22 */
-	RMR,0,		"MOVL	%e,%D",		/* 0x23 */
-	RMR,0,		"MOVL	%T,%e",		/* 0x24 */
-	0,0,		"",			/* 0x25 */
-	RMR,0,		"MOVL	%e,%T",		/* 0x26 */
-	0,0,		"",			/* 0x27 */
-	0,0,		"",			/* 0x28 */
-	0,0,		"",			/* 0x29 */
-	0,0,		"",			/* 0x2a */
-	0,0,		"",			/* 0x2b */
-	0,0,		"",			/* 0x2c */
-	0,0,		"",			/* 0x2d */
-	0,0,		"",			/* 0x2e */
-	0,0,		"",			/* 0x2f */
-	0,0,		"WRMSR",		/* 0x30 */
-	0,0,		"RDTSC",		/* 0x31 */
-	0,0,		"RDMSR",		/* 0x32 */
-	0,0,		"",			/* 0x33 */
-	0,0,		"",			/* 0x34 */
-	0,0,		"",			/* 0x35 */
-	0,0,		"",			/* 0x36 */
-	0,0,		"",			/* 0x37 */
-	0,0,		"",			/* 0x38 */
-	0,0,		"",			/* 0x39 */
-	0,0,		"",			/* 0x3a */
-	0,0,		"",			/* 0x3b */
-	0,0,		"",			/* 0x3c */
-	0,0,		"",			/* 0x3d */
-	0,0,		"",			/* 0x3e */
-	0,0,		"",			/* 0x3f */
-	0,0,		"",			/* 0x40 */
-	0,0,		"",			/* 0x41 */
-	0,0,		"",			/* 0x42 */
-	0,0,		"",			/* 0x43 */
-	0,0,		"",			/* 0x44 */
-	0,0,		"",			/* 0x45 */
-	0,0,		"",			/* 0x46 */
-	0,0,		"",			/* 0x47 */
-	0,0,		"",			/* 0x48 */
-	0,0,		"",			/* 0x49 */
-	0,0,		"",			/* 0x4a */
-	0,0,		"",			/* 0x4b */
-	0,0,		"",			/* 0x4c */
-	0,0,		"",			/* 0x4d */
-	0,0,		"",			/* 0x4e */
-	0,0,		"",			/* 0x4f */
-	0,0,		"",			/* 0x50 */
-	0,0,		"",			/* 0x51 */
-	0,0,		"",			/* 0x52 */
-	0,0,		"",			/* 0x53 */
-	0,0,		"",			/* 0x54 */
-	0,0,		"",			/* 0x55 */
-	0,0,		"",			/* 0x56 */
-	0,0,		"",			/* 0x57 */
-	0,0,		"",			/* 0x58 */
-	0,0,		"",			/* 0x59 */
-	0,0,		"",			/* 0x5a */
-	0,0,		"",			/* 0x5b */
-	0,0,		"",			/* 0x5c */
-	0,0,		"",			/* 0x5d */
-	0,0,		"",			/* 0x5e */
-	0,0,		"",			/* 0x5f */
-	0,0,		"",			/* 0x60 */
-	0,0,		"",			/* 0x61 */
-	0,0,		"",			/* 0x62 */
-	0,0,		"",			/* 0x63 */
-	0,0,		"",			/* 0x64 */
-	0,0,		"",			/* 0x65 */
-	0,0,		"",			/* 0x66 */
-	0,0,		"",			/* 0x67 */
-	0,0,		"",			/* 0x68 */
-	0,0,		"",			/* 0x69 */
-	0,0,		"",			/* 0x6a */
-	0,0,		"",			/* 0x6b */
-	0,0,		"",			/* 0x6c */
-	0,0,		"",			/* 0x6d */
-	0,0,		"",			/* 0x6e */
-	0,0,		"",			/* 0x6f */
-	0,0,		"",			/* 0x70 */
-	0,0,		"",			/* 0x71 */
-	0,0,		"",			/* 0x72 */
-	0,0,		"",			/* 0x73 */
-	0,0,		"",			/* 0x74 */
-	0,0,		"",			/* 0x75 */
-	0,0,		"",			/* 0x76 */
-	0,0,		"",			/* 0x77 */
-	0,0,		"",			/* 0x78 */
-	0,0,		"",			/* 0x79 */
-	0,0,		"",			/* 0x7a */
-	0,0,		"",			/* 0x7b */
-	0,0,		"",			/* 0x7c */
-	0,0,		"",			/* 0x7d */
-	0,0,		"",			/* 0x7e */
-	0,0,		"",			/* 0x7f */
-	Iwds,0,		"JOS	%p",		/* 0x80 */
-	Iwds,0,		"JOC	%p",		/* 0x81 */
-	Iwds,0,		"JCS	%p",		/* 0x82 */
-	Iwds,0,		"JCC	%p",		/* 0x83 */
-	Iwds,0,		"JEQ	%p",		/* 0x84 */
-	Iwds,0,		"JNE	%p",		/* 0x85 */
-	Iwds,0,		"JLS	%p",		/* 0x86 */
-	Iwds,0,		"JHI	%p",		/* 0x87 */
-	Iwds,0,		"JMI	%p",		/* 0x88 */
-	Iwds,0,		"JPL	%p",		/* 0x89 */
-	Iwds,0,		"JPS	%p",		/* 0x8a */
-	Iwds,0,		"JPC	%p",		/* 0x8b */
-	Iwds,0,		"JLT	%p",		/* 0x8c */
-	Iwds,0,		"JGE	%p",		/* 0x8d */
-	Iwds,0,		"JLE	%p",		/* 0x8e */
-	Iwds,0,		"JGT	%p",		/* 0x8f */
-	RMB,0,		"SETOS	%e",		/* 0x90 */
-	RMB,0,		"SETOC	%e",		/* 0x91 */
-	RMB,0,		"SETCS	%e",		/* 0x92 */
-	RMB,0,		"SETCC	%e",		/* 0x93 */
-	RMB,0,		"SETEQ	%e",		/* 0x94 */
-	RMB,0,		"SETNE	%e",		/* 0x95 */
-	RMB,0,		"SETLS	%e",		/* 0x96 */
-	RMB,0,		"SETHI	%e",		/* 0x97 */
-	RMB,0,		"SETMI	%e",		/* 0x98 */
-	RMB,0,		"SETPL	%e",		/* 0x99 */
-	RMB,0,		"SETPS	%e",		/* 0x9a */
-	RMB,0,		"SETPC	%e",		/* 0x9b */
-	RMB,0,		"SETLT	%e",		/* 0x9c */
-	RMB,0,		"SETGE	%e",		/* 0x9d */
-	RMB,0,		"SETLE	%e",		/* 0x9e */
-	RMB,0,		"SETGT	%e",		/* 0x9f */
-	0,0,		"PUSHL	FS",		/* 0xa0 */
-	0,0,		"POPL	FS",		/* 0xa1 */
-	0,0,		"CPUID",		/* 0xa2 */
-	RM,0,		"BT%S	%r,%e",		/* 0xa3 */
-	RM,Ib,		"SHLD%S	%r,%i,%e",	/* 0xa4 */
-	RM,0,		"SHLD%S	%r,CL,%e",	/* 0xa5 */
-	0,0,		"",			/* 0xa6 */
-	0,0,		"",			/* 0xa7 */
-	0,0,		"PUSHL	GS",		/* 0xa8 */
-	0,0,		"POPL	GS",		/* 0xa9 */
-	0,0,		"",			/* 0xaa */
-	RM,0,		"BTS%S	%r,%e",		/* 0xab */
-	RM,Ib,		"SHRD%S	%r,%i,%e",	/* 0xac */
-	RM,0,		"SHRD%S	%r,CL,%e",	/* 0xad */
-	0,0,		"",			/* 0xae */
-	RM,0,		"IMUL%S	%e,%r",		/* 0xaf */
-	0,0,		"",			/* 0xb0 */
-	0,0,		"",			/* 0xb1 */
-	RMM,0,		"LSS	%e,%r",		/* 0xb2 */
-	RM,0,		"BTR%S	%r,%e",		/* 0xb3 */
-	RMM,0,		"LFS	%e,%r",		/* 0xb4 */
-	RMM,0,		"LGS	%e,%r",		/* 0xb5 */
-	RMB,0,		"MOVBZX	%e,%R",		/* 0xb6 */
-	RM,0,		"MOVWZX	%e,%R",		/* 0xb7 */
-	0,0,		"",			/* 0xb8 */
-	0,0,		"",			/* 0xb9 */
-	RMOP,0,		optab0FBA,		/* 0xba */
-	RM,0,		"BTC%S	%e,%r",		/* 0xbb */
-	RM,0,		"BSF%S	%e,%r",		/* 0xbc */
-	RM,0,		"BSR%S	%e,%r",		/* 0xbd */
-	RMB,0,		"MOVBSX	%e,%R",		/* 0xbe */
-	RM,0,		"MOVWSX	%e,%R",		/* 0xbf */
+[0x00] =	{ RMOP,0,		optab0F00 },
+[0x01] =	{ RMOP,0,		optab0F01 },
+[0x02] =	{ RM,0,		"LAR	%e,%r" },
+[0x03] =	{ RM,0,		"LSL	%e,%r" },
+[0x05] =	{ 0,0,		"SYSCALL" },
+[0x06] =	{ 0,0,		"CLTS" },
+[0x07] =	{ 0,0,		"SYSRET" },
+[0x08] =	{ 0,0,		"INVD" },
+[0x09] =	{ 0,0,		"WBINVD" },
+[0x0B] =	{ 0,0,		"UD2" },
+[0x0F] =	{ RM,AUX,		optab0F0F },		/* 3DNow! */
+[0x10] =	{ RM,0,		"MOVU%s	%x,%X" },
+[0x11] =	{ RM,0,		"MOVU%s	%X,%x" },
+[0x12] =	{ RM,0,		"MOV[H]L%s	%x,%X" },	/* TO DO: H if source is XMM */
+[0x13] =	{ RM,0,		"MOVL%s	%X,%e" },
+[0x14] =	{ RM,0,		"UNPCKL%s	%x,%X" },
+[0x15] =	{ RM,0,		"UNPCKH%s	%x,%X" },
+[0x16] =	{ RM,0,		"MOV[L]H%s	%x,%X" },	/* TO DO: L if source is XMM */
+[0x17] =	{ RM,0,		"MOVH%s	%X,%x" },
+[0x20] =	{ RMR,0,		"MOVL	%C,%e" },
+[0x21] =	{ RMR,0,		"MOVL	%D,%e" },
+[0x22] =	{ RMR,0,		"MOVL	%e,%C" },
+[0x23] =	{ RMR,0,		"MOVL	%e,%D" },
+[0x24] =	{ RMR,0,		"MOVL	%T,%e" },
+[0x26] =	{ RMR,0,		"MOVL	%e,%T" },
+[0x28] =	{ RM,0,		"MOVA%s	%x,%X" },
+[0x29] =	{ RM,0,		"MOVA%s	%X,%x" },
+[0x2A] =	{ RM,0,		"CVTPL2%s	%m*,%X" },
+[0x2B] =	{ RM,0,		"MOVNT%s	%X,%e" },
+[0x2C] =	{ RM,0,		"CVTT%s2PL	%x,%M" },
+[0x2D] =	{ RM,0,		"CVT%s2PL	%x,%M" },
+[0x2E] =	{ RM,0,		"UCOMISS	%x,%X" },
+[0x2F] =	{ RM,0,		"COMISS	%x,%X" },
+[0x30] =	{ 0,0,		"WRMSR" },
+[0x31] =	{ 0,0,		"RDTSC" },
+[0x32] =	{ 0,0,		"RDMSR" },
+[0x33] =	{ 0,0,		"RDPMC" },
+[0x42] =	{ RM,0,		"CMOVC	%e,%r" },		/* CF */
+[0x43] =	{ RM,0,		"CMOVNC	%e,%r" },		/* ¬ CF */
+[0x44] =	{ RM,0,		"CMOVZ	%e,%r" },		/* ZF */
+[0x45] =	{ RM,0,		"CMOVNZ	%e,%r" },		/* ¬ ZF */
+[0x46] =	{ RM,0,		"CMOVBE	%e,%r" },		/* CF ∨ ZF */
+[0x47] =	{ RM,0,		"CMOVA	%e,%r" },		/* ¬CF ∧ ¬ZF */
+[0x48] =	{ RM,0,		"CMOVS	%e,%r" },		/* SF */
+[0x49] =	{ RM,0,		"CMOVNS	%e,%r" },		/* ¬ SF */
+[0x4A] =	{ RM,0,		"CMOVP	%e,%r" },		/* PF */
+[0x4B] =	{ RM,0,		"CMOVNP	%e,%r" },		/* ¬ PF */
+[0x4C] =	{ RM,0,		"CMOVLT	%e,%r" },		/* LT ≡ OF ≠ SF */
+[0x4D] =	{ RM,0,		"CMOVGE	%e,%r" },		/* GE ≡ ZF ∨ SF */
+[0x4E] =	{ RM,0,		"CMOVLE	%e,%r" },		/* LE ≡ ZF ∨ LT */
+[0x4F] =	{ RM,0,		"CMOVGT	%e,%r" },		/* GT ≡ ¬ZF ∧ GE */
+[0x50] =	{ RM,0,		"MOVMSK%s	%X,%r" },	/* TO DO: check */
+[0x51] =	{ RM,0,		"SQRT%s	%x,%X" },
+[0x52] =	{ RM,0,		"RSQRT%s	%x,%X" },
+[0x53] =	{ RM,0,		"RCP%s	%x,%X" },
+[0x54] =	{ RM,0,		"AND%s	%x,%X" },
+[0x55] =	{ RM,0,		"ANDN%s	%x,%X" },
+[0x56] =	{ RM,0,		"OR%s	%x,%X" },		/* TO DO: S/D */
+[0x57] =	{ RM,0,		"XOR%s	%x,%X" },		/* S/D */
+[0x58] =	{ RM,0,		"ADD%s	%x,%X" },		/* S/P S/D */
+[0x59] =	{ RM,0,		"MUL%s	%x,%X" },
+[0x5A] =	{ RM,0,		"CVTPS2PD	%x,%X" },
+[0x5B] =	{ RM,0,		"CVTPL2PS	%x,%X" },
+[0x5C] =	{ RM,0,		"SUB%s	%x,%X" },
+[0x5D] =	{ RM,0,		"MIN%s	%x,%X" },
+[0x5E] =	{ RM,0,		"DIV%s	%x,%X" },		/* TO DO: S/P S/D */
+[0x5F] =	{ RM,0,		"MAX%s	%x,%X" },
+[0x60] =	{ RM,0,		"PUNPCKLBW %m,%M" },
+[0x61] =	{ RM,0,		"PUNPCKLWL %m,%M" },
+[0x62] =	{ RM,0,		"PUNPCKLLQ %m,%M" },
+[0x63] =	{ RM,0,		"PACKSSWB %m,%M" },
+[0x64] =	{ RM,0,		"PCMPGTB %m,%M" },
+[0x65] =	{ RM,0,		"PCMPGTW %m,%M" },
+[0x66] =	{ RM,0,		"PCMPGTL %m,%M" },
+[0x67] =	{ RM,0,		"PACKUSWB %m,%M" },
+[0x68] =	{ RM,0,		"PUNPCKHBW %m,%M" },
+[0x69] =	{ RM,0,		"PUNPCKHWL %m,%M" },
+[0x6A] =	{ RM,0,		"PUNPCKHLQ %m,%M" },
+[0x6B] =	{ RM,0,		"PACKSSLW %m,%M" },
+[0x6E] =	{ RM,0,		"MOV%S %e,%M" },
+[0x6F] =	{ RM,0,		"MOVQ %m,%M" },
+[0x70] =	{ RM,Ib,		"PSHUFW	%i,%m,%M" },
+[0x74] =	{ RM,0,		"PCMPEQB %m,%M" },
+[0x75] =	{ RM,0,		"PCMPEQW %m,%M" },
+[0x76] =	{ RM,0,		"PCMPEQL %m,%M" },
+[0x77] =	{ 0,0,		"EMMS" },
+[0x7E] =	{ RM,0,		"MOV%S %M,%e" },
+[0x7F] =	{ RM,0,		"MOVQ %M,%m" },
+[0xAE] =	{ RMOP,0,		optab0FAE },
+[0xAA] =	{ 0,0,		"RSM" },
+[0xB0] =	{ RM,0,		"CMPXCHGB	%r,%e" },
+[0xB1] =	{ RM,0,		"CMPXCHG%S	%r,%e" },
+[0xC0] =	{ RMB,0,		"XADDB	%r,%e" },
+[0xC1] =	{ RM,0,		"XADD%S	%r,%e" },
+[0xC2] =	{ RM,Ib,		"CMP%s	%x,%X,%#i" },
+[0xC3] =	{ RM,0,		"MOVNTI%S	%r,%e" },
+[0xC6] =	{ RM,Ib,		"SHUF%s	%i,%x,%X" },
+[0xC8] =	{ 0,0,		"BSWAP	AX" },
+[0xC9] =	{ 0,0,		"BSWAP	CX" },
+[0xCA] =	{ 0,0,		"BSWAP	DX" },
+[0xCB] =	{ 0,0,		"BSWAP	BX" },
+[0xCC] =	{ 0,0,		"BSWAP	SP" },
+[0xCD] =	{ 0,0,		"BSWAP	BP" },
+[0xCE] =	{ 0,0,		"BSWAP	SI" },
+[0xCF] =	{ 0,0,		"BSWAP	DI" },
+[0xD1] =	{ RM,0,		"PSRLW %m,%M" },
+[0xD2] =	{ RM,0,		"PSRLL %m,%M" },
+[0xD3] =	{ RM,0,		"PSRLQ %m,%M" },
+[0xD5] =	{ RM,0,		"PMULLW %m,%M" },
+[0xD6] =	{ RM,0,		"MOVQOZX	%m*,%X" },
+[0xD7] =	{ RM,0,		"PMOVMSKB %m,%r" },
+[0xD8] =	{ RM,0,		"PSUBUSB %m,%M" },
+[0xD9] =	{ RM,0,		"PSUBUSW %m,%M" },
+[0xDA] =	{ RM,0,		"PMINUB %m,%M" },
+[0xDB] =	{ RM,0,		"PAND %m,%M" },
+[0xDC] =	{ RM,0,		"PADDUSB %m,%M" },
+[0xDD] =	{ RM,0,		"PADDUSW %m,%M" },
+[0xDE] =	{ RM,0,		"PMAXUB %m,%M" },
+[0xDF] =	{ RM,0,		"PANDN %m,%M" },
+[0xE0] =	{ RM,0,		"PAVGB %m,%M" },
+[0xE1] =	{ RM,0,		"PSRAW %m,%M" },
+[0xE2] =	{ RM,0,		"PSRAL %m,%M" },
+[0xE3] =	{ RM,0,		"PAVGW %m,%M" },
+[0xE4] =	{ RM,0,		"PMULHUW %m,%M" },
+[0xE5] =	{ RM,0,		"PMULHW %m,%M" },
+[0xE7] =	{ RM,0,		"MOVNTQ	%M,%e" },
+[0xE8] =	{ RM,0,		"PSUBSB %m,%M" },
+[0xE9] =	{ RM,0,		"PSUBSW %m,%M" },
+[0xEA] =	{ RM,0,		"PMINSW %m,%M" },
+[0xEB] =	{ RM,0,		"POR %m,%M" },
+[0xEC] =	{ RM,0,		"PADDSB %m,%M" },
+[0xED] =	{ RM,0,		"PADDSW %m,%M" },
+[0xEE] =	{ RM,0,		"PMAXSW %m,%M" },
+[0xEF] =	{ RM,0,		"PXOR %m,%M" },
+[0xF1] =	{ RM,0,		"PSLLW %m,%M" },
+[0xF2] =	{ RM,0,		"PSLLL %m,%M" },
+[0xF3] =	{ RM,0,		"PSLLQ %m,%M" },
+[0xF4] =	{ RM,0,		"PMULULQ	%m,%M" },
+[0xF5] =	{ RM,0,		"PMADDWL %m,%M" },
+[0xF6] =	{ RM,0,		"PSADBW %m,%M" },
+[0xF7] =	{ RMR,0,		"MASKMOVQ	%m,%M" },
+[0xF8] =	{ RM,0,		"PSUBB %m,%M" },
+[0xF9] =	{ RM,0,		"PSUBW %m,%M" },
+[0xFA] =	{ RM,0,		"PSUBL %m,%M" },
+[0xFC] =	{ RM,0,		"PADDB %m,%M" },
+[0xFD] =	{ RM,0,		"PADDW %m,%M" },
+[0xFE] =	{ RM,0,		"PADDL %m,%M" },
+
+[0x80] =	{ Iwds,0,		"JOS	%p" },
+[0x81] =	{ Iwds,0,		"JOC	%p" },
+[0x82] =	{ Iwds,0,		"JCS	%p" },
+[0x83] =	{ Iwds,0,		"JCC	%p" },
+[0x84] =	{ Iwds,0,		"JEQ	%p" },
+[0x85] =	{ Iwds,0,		"JNE	%p" },
+[0x86] =	{ Iwds,0,		"JLS	%p" },
+[0x87] =	{ Iwds,0,		"JHI	%p" },
+[0x88] =	{ Iwds,0,		"JMI	%p" },
+[0x89] =	{ Iwds,0,		"JPL	%p" },
+[0x8a] =	{ Iwds,0,		"JPS	%p" },
+[0x8b] =	{ Iwds,0,		"JPC	%p" },
+[0x8c] =	{ Iwds,0,		"JLT	%p" },
+[0x8d] =	{ Iwds,0,		"JGE	%p" },
+[0x8e] =	{ Iwds,0,		"JLE	%p" },
+[0x8f] =	{ Iwds,0,		"JGT	%p" },
+[0x90] =	{ RMB,0,		"SETOS	%e" },
+[0x91] =	{ RMB,0,		"SETOC	%e" },
+[0x92] =	{ RMB,0,		"SETCS	%e" },
+[0x93] =	{ RMB,0,		"SETCC	%e" },
+[0x94] =	{ RMB,0,		"SETEQ	%e" },
+[0x95] =	{ RMB,0,		"SETNE	%e" },
+[0x96] =	{ RMB,0,		"SETLS	%e" },
+[0x97] =	{ RMB,0,		"SETHI	%e" },
+[0x98] =	{ RMB,0,		"SETMI	%e" },
+[0x99] =	{ RMB,0,		"SETPL	%e" },
+[0x9a] =	{ RMB,0,		"SETPS	%e" },
+[0x9b] =	{ RMB,0,		"SETPC	%e" },
+[0x9c] =	{ RMB,0,		"SETLT	%e" },
+[0x9d] =	{ RMB,0,		"SETGE	%e" },
+[0x9e] =	{ RMB,0,		"SETLE	%e" },
+[0x9f] =	{ RMB,0,		"SETGT	%e" },
+[0xa0] =	{ 0,0,		"PUSHL	FS" },
+[0xa1] =	{ 0,0,		"POPL	FS" },
+[0xa2] =	{ 0,0,		"CPUID" },
+[0xa3] =	{ RM,0,		"BT%S	%r,%e" },
+[0xa4] =	{ RM,Ib,		"SHLD%S	%r,%i,%e" },
+[0xa5] =	{ RM,0,		"SHLD%S	%r,CL,%e" },
+[0xa8] =	{ 0,0,		"PUSHL	GS" },
+[0xa9] =	{ 0,0,		"POPL	GS" },
+[0xab] =	{ RM,0,		"BTS%S	%r,%e" },
+[0xac] =	{ RM,Ib,		"SHRD%S	%r,%i,%e" },
+[0xad] =	{ RM,0,		"SHRD%S	%r,CL,%e" },
+[0xaf] =	{ RM,0,		"IMUL%S	%e,%r" },
+[0xb2] =	{ RMM,0,		"LSS	%e,%r" },
+[0xb3] =	{ RM,0,		"BTR%S	%r,%e" },
+[0xb4] =	{ RMM,0,		"LFS	%e,%r" },
+[0xb5] =	{ RMM,0,		"LGS	%e,%r" },
+[0xb6] =	{ RMB,0,		"MOVBZX	%e,%R" },
+[0xb7] =	{ RM,0,		"MOVWZX	%e,%R" },
+[0xba] =	{ RMOP,0,		optab0FBA },
+[0xbb] =	{ RM,0,		"BTC%S	%e,%r" },
+[0xbc] =	{ RM,0,		"BSF%S	%e,%r" },
+[0xbd] =	{ RM,0,		"BSR%S	%e,%r" },
+[0xbe] =	{ RMB,0,		"MOVBSX	%e,%R" },
+[0xbf] =	{ RM,0,		"MOVWSX	%e,%R" },
+[0xc7] =	{ RMOP,0,		optab0FC7 },
 };
 
 static Optable optab80[8]=
 {
-	Ib,0,		"ADDB	%i,%e",		/* 0x00 */
-	Ib,0,		"ORB	%i,%e",		/* 0x01 */
-	Ib,0,		"ADCB	%i,%e",		/* 0x02 */
-	Ib,0,		"SBBB	%i,%e",		/* 0x03 */
-	Ib,0,		"ANDB	%i,%e",		/* 0x04 */
-	Ib,0,		"SUBB	%i,%e",		/* 0x05 */
-	Ib,0,		"XORB	%i,%e",		/* 0x06 */
-	Ib,0,		"CMPB	%e,%i",		/* 0x07 */
+[0x00] =	{ Ib,0,		"ADDB	%i,%e" },
+[0x01] =	{ Ib,0,		"ORB	%i,%e" },
+[0x02] =	{ Ib,0,		"ADCB	%i,%e" },
+[0x03] =	{ Ib,0,		"SBBB	%i,%e" },
+[0x04] =	{ Ib,0,		"ANDB	%i,%e" },
+[0x05] =	{ Ib,0,		"SUBB	%i,%e" },
+[0x06] =	{ Ib,0,		"XORB	%i,%e" },
+[0x07] =	{ Ib,0,		"CMPB	%e,%i" },
 };
 
 static Optable optab81[8]=
 {
-	Iwd,0,		"ADD%S	%i,%e",		/* 0x00 */
-	Iwd,0,		"OR%S	%i,%e",		/* 0x01 */
-	Iwd,0,		"ADC%S	%i,%e",		/* 0x02 */
-	Iwd,0,		"SBB%S	%i,%e",		/* 0x03 */
-	Iwd,0,		"AND%S	%i,%e",		/* 0x04 */
-	Iwd,0,		"SUB%S	%i,%e",		/* 0x05 */
-	Iwd,0,		"XOR%S	%i,%e",		/* 0x06 */
-	Iwd,0,		"CMP%S	%e,%i",		/* 0x07 */
+[0x00] =	{ Iwd,0,		"ADD%S	%i,%e" },
+[0x01] =	{ Iwd,0,		"OR%S	%i,%e" },
+[0x02] =	{ Iwd,0,		"ADC%S	%i,%e" },
+[0x03] =	{ Iwd,0,		"SBB%S	%i,%e" },
+[0x04] =	{ Iwd,0,		"AND%S	%i,%e" },
+[0x05] =	{ Iwd,0,		"SUB%S	%i,%e" },
+[0x06] =	{ Iwd,0,		"XOR%S	%i,%e" },
+[0x07] =	{ Iwd,0,		"CMP%S	%e,%i" },
 };
 
 static Optable optab83[8]=
 {
-	Ibs,0,		"ADD%S	%i,%e",		/* 0x00 */
-	Ibs,0,		"OR%S	%i,%e",		/* 0x01 */
-	Ibs,0,		"ADC%S	%i,%e",		/* 0x02 */
-	Ibs,0,		"SBB%S	%i,%e",		/* 0x03 */
-	Ibs,0,		"AND%S	%i,%e",		/* 0x04 */
-	Ibs,0,		"SUB%S	%i,%e",		/* 0x05 */
-	Ibs,0,		"XOR%S	%i,%e",		/* 0x06 */
-	Ibs,0,		"CMP%S	%e,%i",		/* 0x07 */
+[0x00] =	{ Ibs,0,		"ADD%S	%i,%e" },
+[0x01] =	{ Ibs,0,		"OR%S	%i,%e" },
+[0x02] =	{ Ibs,0,		"ADC%S	%i,%e" },
+[0x03] =	{ Ibs,0,		"SBB%S	%i,%e" },
+[0x04] =	{ Ibs,0,		"AND%S	%i,%e" },
+[0x05] =	{ Ibs,0,		"SUB%S	%i,%e" },
+[0x06] =	{ Ibs,0,		"XOR%S	%i,%e" },
+[0x07] =	{ Ibs,0,		"CMP%S	%e,%i" },
 };
 
 static Optable optabC0[8] =
 {
-	Ib,0,		"ROLB	%i,%e",		/* 0x00 */
-	Ib,0,		"RORB	%i,%e",		/* 0x01 */
-	Ib,0,		"RCLB	%i,%e",		/* 0x02 */
-	Ib,0,		"RCRB	%i,%e",		/* 0x03 */
-	Ib,0,		"SHLB	%i,%e",		/* 0x04 */
-	Ib,0,		"SHRB	%i,%e",		/* 0x05 */
-	0,0,		"",			/* 0x06 */
-	Ib,0,		"SARB	%i,%e",		/* 0x07 */
+[0x00] =	{ Ib,0,		"ROLB	%i,%e" },
+[0x01] =	{ Ib,0,		"RORB	%i,%e" },
+[0x02] =	{ Ib,0,		"RCLB	%i,%e" },
+[0x03] =	{ Ib,0,		"RCRB	%i,%e" },
+[0x04] =	{ Ib,0,		"SHLB	%i,%e" },
+[0x05] =	{ Ib,0,		"SHRB	%i,%e" },
+[0x07] =	{ Ib,0,		"SARB	%i,%e" },
 };
 
 static Optable optabC1[8] =
 {
-	Ib,0,		"ROL%S	%i,%e",		/* 0x00 */
-	Ib,0,		"ROR%S	%i,%e",		/* 0x01 */
-	Ib,0,		"RCL%S	%i,%e",		/* 0x02 */
-	Ib,0,		"RCR%S	%i,%e",		/* 0x03 */
-	Ib,0,		"SHL%S	%i,%e",		/* 0x04 */
-	Ib,0,		"SHR%S	%i,%e",		/* 0x05 */
-	0,0,		"",			/* 0x06 */
-	Ib,0,		"SAR%S	%i,%e",		/* 0x07 */
+[0x00] =	{ Ib,0,		"ROL%S	%i,%e" },
+[0x01] =	{ Ib,0,		"ROR%S	%i,%e" },
+[0x02] =	{ Ib,0,		"RCL%S	%i,%e" },
+[0x03] =	{ Ib,0,		"RCR%S	%i,%e" },
+[0x04] =	{ Ib,0,		"SHL%S	%i,%e" },
+[0x05] =	{ Ib,0,		"SHR%S	%i,%e" },
+[0x07] =	{ Ib,0,		"SAR%S	%i,%e" },
 };
 
 static Optable optabD0[8] =
 {
-	0,0,		"ROLB	%e",		/* 0x00 */
-	0,0,		"RORB	%e",		/* 0x01 */
-	0,0,		"RCLB	%e",		/* 0x02 */
-	0,0,		"RCRB	%e",		/* 0x03 */
-	0,0,		"SHLB	%e",		/* 0x04 */
-	0,0,		"SHRB	%e",		/* 0x05 */
-	0,0,		"",			/* 0x06 */
-	0,0,		"SARB	%e",		/* 0x07 */
+[0x00] =	{ 0,0,		"ROLB	%e" },
+[0x01] =	{ 0,0,		"RORB	%e" },
+[0x02] =	{ 0,0,		"RCLB	%e" },
+[0x03] =	{ 0,0,		"RCRB	%e" },
+[0x04] =	{ 0,0,		"SHLB	%e" },
+[0x05] =	{ 0,0,		"SHRB	%e" },
+[0x07] =	{ 0,0,		"SARB	%e" },
 };
 
 static Optable optabD1[8] =
 {
-	0,0,		"ROL%S	%e",		/* 0x00 */
-	0,0,		"ROR%S	%e",		/* 0x01 */
-	0,0,		"RCL%S	%e",		/* 0x02 */
-	0,0,		"RCR%S	%e",		/* 0x03 */
-	0,0,		"SHL%S	%e",		/* 0x04 */
-	0,0,		"SHR%S	%e",		/* 0x05 */
-	0,0,		"",			/* 0x06 */
-	0,0,		"SAR%S	%e",		/* 0x07 */
+[0x00] =	{ 0,0,		"ROL%S	%e" },
+[0x01] =	{ 0,0,		"ROR%S	%e" },
+[0x02] =	{ 0,0,		"RCL%S	%e" },
+[0x03] =	{ 0,0,		"RCR%S	%e" },
+[0x04] =	{ 0,0,		"SHL%S	%e" },
+[0x05] =	{ 0,0,		"SHR%S	%e" },
+[0x07] =	{ 0,0,		"SAR%S	%e" },
 };
 
 static Optable optabD2[8] =
 {
-	0,0,		"ROLB	CL,%e",		/* 0x00 */
-	0,0,		"RORB	CL,%e",		/* 0x01 */
-	0,0,		"RCLB	CL,%e",		/* 0x02 */
-	0,0,		"RCRB	CL,%e",		/* 0x03 */
-	0,0,		"SHLB	CL,%e",		/* 0x04 */
-	0,0,		"SHRB	CL,%e",		/* 0x05 */
-	0,0,		"",			/* 0x06 */
-	0,0,		"SARB	CL,%e",		/* 0x07 */
+[0x00] =	{ 0,0,		"ROLB	CL,%e" },
+[0x01] =	{ 0,0,		"RORB	CL,%e" },
+[0x02] =	{ 0,0,		"RCLB	CL,%e" },
+[0x03] =	{ 0,0,		"RCRB	CL,%e" },
+[0x04] =	{ 0,0,		"SHLB	CL,%e" },
+[0x05] =	{ 0,0,		"SHRB	CL,%e" },
+[0x07] =	{ 0,0,		"SARB	CL,%e" },
 };
 
 static Optable optabD3[8] =
 {
-	0,0,		"ROL%S	CL,%e",		/* 0x00 */
-	0,0,		"ROR%S	CL,%e",		/* 0x01 */
-	0,0,		"RCL%S	CL,%e",		/* 0x02 */
-	0,0,		"RCR%S	CL,%e",		/* 0x03 */
-	0,0,		"SHL%S	CL,%e",		/* 0x04 */
-	0,0,		"SHR%S	CL,%e",		/* 0x05 */
-	0,0,		"",			/* 0x06 */
-	0,0,		"SAR%S	CL,%e",		/* 0x07 */
+[0x00] =	{ 0,0,		"ROL%S	CL,%e" },
+[0x01] =	{ 0,0,		"ROR%S	CL,%e" },
+[0x02] =	{ 0,0,		"RCL%S	CL,%e" },
+[0x03] =	{ 0,0,		"RCR%S	CL,%e" },
+[0x04] =	{ 0,0,		"SHL%S	CL,%e" },
+[0x05] =	{ 0,0,		"SHR%S	CL,%e" },
+[0x07] =	{ 0,0,		"SAR%S	CL,%e" },
 };
 
 static Optable optabD8[8+8] =
 {
-	0,0,		"FADDF	%e,F0",		/* 0x00 */
-	0,0,		"FMULF	%e,F0",		/* 0x01 */
-	0,0,		"FCOMF	%e,F0",		/* 0x02 */
-	0,0,		"FCOMFP	%e,F0",		/* 0x03 */
-	0,0,		"FSUBF	%e,F0",		/* 0x04 */
-	0,0,		"FSUBRF	%e,F0",		/* 0x05 */
-	0,0,		"FDIVF	%e,F0",		/* 0x06 */
-	0,0,		"FDIVRF	%e,F0",		/* 0x07 */
-	0,0,		"FADDD	%f,F0",		/* 0x08 */
-	0,0,		"FMULD	%f,F0",		/* 0x09 */
-	0,0,		"FCOMD	%f,F0",		/* 0x0a */
-	0,0,		"FCOMPD	%f,F0",		/* 0x0b */
-	0,0,		"FSUBD	%f,F0",		/* 0x0c */
-	0,0,		"FSUBRD	%f,F0",		/* 0x0d */
-	0,0,		"FDIVD	%f,F0",		/* 0x0e */
-	0,0,		"FDIVRD	%f,F0",		/* 0x0f */
+[0x00] =	{ 0,0,		"FADDF	%e,F0" },
+[0x01] =	{ 0,0,		"FMULF	%e,F0" },
+[0x02] =	{ 0,0,		"FCOMF	%e,F0" },
+[0x03] =	{ 0,0,		"FCOMFP	%e,F0" },
+[0x04] =	{ 0,0,		"FSUBF	%e,F0" },
+[0x05] =	{ 0,0,		"FSUBRF	%e,F0" },
+[0x06] =	{ 0,0,		"FDIVF	%e,F0" },
+[0x07] =	{ 0,0,		"FDIVRF	%e,F0" },
+[0x08] =	{ 0,0,		"FADDD	%f,F0" },
+[0x09] =	{ 0,0,		"FMULD	%f,F0" },
+[0x0a] =	{ 0,0,		"FCOMD	%f,F0" },
+[0x0b] =	{ 0,0,		"FCOMPD	%f,F0" },
+[0x0c] =	{ 0,0,		"FSUBD	%f,F0" },
+[0x0d] =	{ 0,0,		"FSUBRD	%f,F0" },
+[0x0e] =	{ 0,0,		"FDIVD	%f,F0" },
+[0x0f] =	{ 0,0,		"FDIVRD	%f,F0" },
 };
 /*
- *	optabD9 and optabDB use the following encoding: 
+ *	optabD9 and optabDB use the following encoding:
  *	if (0 <= modrm <= 2) instruction = optabDx[modrm&0x07];
  *	else instruction = optabDx[(modrm&0x3f)+8];
  *
@@ -772,527 +941,504 @@ static Optable optabD8[8+8] =
  */
 static Optable optabD9[64+8] =
 {
-	0,0,		"FMOVF	%e,F0",		/* 0x00 */
-	0,0,		"",			/* 0x01 */
-	0,0,		"FMOVF	F0,%e",		/* 0x02 */
-	0,0,		"FMOVFP	F0,%e",		/* 0x03 */
-	0,0,		"FLDENV%S %e",		/* 0x04 */
-	0,0,		"FLDCW	%e",		/* 0x05 */
-	0,0,		"FSTENV%S %e",		/* 0x06 */
-	0,0,		"FSTCW	%e",		/* 0x07 */
-	0,0,		"FMOVD	F0,F0",		/* 0x08 */	/* Mod R/M = 11xx xxxx*/
-	0,0,		"FMOVD	F1,F0",		/* 0x09 */
-	0,0,		"FMOVD	F2,F0",		/* 0x0a */
-	0,0,		"FMOVD	F3,F0",		/* 0x0b */
-	0,0,		"FMOVD	F4,F0",		/* 0x0c */
-	0,0,		"FMOVD	F5,F0",		/* 0x0d */
-	0,0,		"FMOVD	F6,F0",		/* 0x0e */
-	0,0,		"FMOVD	F7,F0",		/* 0x0f */
-	0,0,		"FXCHD	F0,F0",		/* 0x10 */
-	0,0,		"FXCHD	F1,F0",		/* 0x11 */
-	0,0,		"FXCHD	F2,F0",		/* 0x12 */
-	0,0,		"FXCHD	F3,F0",		/* 0x13 */
-	0,0,		"FXCHD	F4,F0",		/* 0x14 */
-	0,0,		"FXCHD	F5,F0",		/* 0x15 */
-	0,0,		"FXCHD	F6,F0",		/* 0x16 */
-	0,0,		"FXCHD	F7,F0",		/* 0x17 */
-	0,0,		"FNOP",			/* 0x18 */
-	0,0,		"",			/* 0x19 */
-	0,0,		"",			/* 0x1a */
-	0,0,		"",			/* 0x1b */
-	0,0,		"",			/* 0x1c */
-	0,0,		"",			/* 0x1d */
-	0,0,		"",			/* 0x1e */
-	0,0,		"",			/* 0x1f */
-	0,0,		"",			/* 0x20 */
-	0,0,		"",			/* 0x21 */
-	0,0,		"",			/* 0x22 */
-	0,0,		"",			/* 0x23 */
-	0,0,		"",			/* 0x24 */
-	0,0,		"",			/* 0x25 */
-	0,0,		"",			/* 0x26 */
-	0,0,		"",			/* 0x27 */
-	0,0,		"FCHS",			/* 0x28 */
-	0,0,		"FABS",			/* 0x29 */
-	0,0,		"",			/* 0x2a */
-	0,0,		"",			/* 0x2b */
-	0,0,		"FTST",			/* 0x2c */
-	0,0,		"FXAM",			/* 0x2d */
-	0,0,		"",			/* 0x2e */
-	0,0,		"",			/* 0x2f */
-	0,0,		"FLD1",			/* 0x30 */
-	0,0,		"FLDL2T",		/* 0x31 */
-	0,0,		"FLDL2E",		/* 0x32 */
-	0,0,		"FLDPI",		/* 0x33 */
-	0,0,		"FLDLG2",		/* 0x34 */
-	0,0,		"FLDLN2",		/* 0x35 */
-	0,0,		"FLDZ",			/* 0x36 */
-	0,0,		"",			/* 0x37 */
-	0,0,		"F2XM1",		/* 0x38 */
-	0,0,		"FYL2X",		/* 0x39 */
-	0,0,		"FPTAN",		/* 0x3a */
-	0,0,		"FPATAN",		/* 0x3b */
-	0,0,		"FXTRACT",		/* 0x3c */
-	0,0,		"FPREM1",		/* 0x3d */
-	0,0,		"FDECSTP",		/* 0x3e */
-	0,0,		"FNCSTP",		/* 0x3f */
-	0,0,		"FPREM",		/* 0x40 */
-	0,0,		"FYL2XP1",		/* 0x41 */
-	0,0,		"FSQRT",		/* 0x42 */
-	0,0,		"FSINCOS",		/* 0x43 */
-	0,0,		"FRNDINT",		/* 0x44 */
-	0,0,		"FSCALE",		/* 0x45 */
-	0,0,		"FSIN",			/* 0x46 */
-	0,0,		"FCOS",			/* 0x47 */
+[0x00] =	{ 0,0,		"FMOVF	%e,F0" },
+[0x02] =	{ 0,0,		"FMOVF	F0,%e" },
+[0x03] =	{ 0,0,		"FMOVFP	F0,%e" },
+[0x04] =	{ 0,0,		"FLDENV%S %e" },
+[0x05] =	{ 0,0,		"FLDCW	%e" },
+[0x06] =	{ 0,0,		"FSTENV%S %e" },
+[0x07] =	{ 0,0,		"FSTCW	%e" },
+[0x08] =	{ 0,0,		"FMOVD	F0,F0" },		/* Mod R/M = 11xx xxxx*/
+[0x09] =	{ 0,0,		"FMOVD	F1,F0" },
+[0x0a] =	{ 0,0,		"FMOVD	F2,F0" },
+[0x0b] =	{ 0,0,		"FMOVD	F3,F0" },
+[0x0c] =	{ 0,0,		"FMOVD	F4,F0" },
+[0x0d] =	{ 0,0,		"FMOVD	F5,F0" },
+[0x0e] =	{ 0,0,		"FMOVD	F6,F0" },
+[0x0f] =	{ 0,0,		"FMOVD	F7,F0" },
+[0x10] =	{ 0,0,		"FXCHD	F0,F0" },
+[0x11] =	{ 0,0,		"FXCHD	F1,F0" },
+[0x12] =	{ 0,0,		"FXCHD	F2,F0" },
+[0x13] =	{ 0,0,		"FXCHD	F3,F0" },
+[0x14] =	{ 0,0,		"FXCHD	F4,F0" },
+[0x15] =	{ 0,0,		"FXCHD	F5,F0" },
+[0x16] =	{ 0,0,		"FXCHD	F6,F0" },
+[0x17] =	{ 0,0,		"FXCHD	F7,F0" },
+[0x18] =	{ 0,0,		"FNOP" },
+[0x28] =	{ 0,0,		"FCHS" },
+[0x29] =	{ 0,0,		"FABS" },
+[0x2c] =	{ 0,0,		"FTST" },
+[0x2d] =	{ 0,0,		"FXAM" },
+[0x30] =	{ 0,0,		"FLD1" },
+[0x31] =	{ 0,0,		"FLDL2T" },
+[0x32] =	{ 0,0,		"FLDL2E" },
+[0x33] =	{ 0,0,		"FLDPI" },
+[0x34] =	{ 0,0,		"FLDLG2" },
+[0x35] =	{ 0,0,		"FLDLN2" },
+[0x36] =	{ 0,0,		"FLDZ" },
+[0x38] =	{ 0,0,		"F2XM1" },
+[0x39] =	{ 0,0,		"FYL2X" },
+[0x3a] =	{ 0,0,		"FPTAN" },
+[0x3b] =	{ 0,0,		"FPATAN" },
+[0x3c] =	{ 0,0,		"FXTRACT" },
+[0x3d] =	{ 0,0,		"FPREM1" },
+[0x3e] =	{ 0,0,		"FDECSTP" },
+[0x3f] =	{ 0,0,		"FNCSTP" },
+[0x40] =	{ 0,0,		"FPREM" },
+[0x41] =	{ 0,0,		"FYL2XP1" },
+[0x42] =	{ 0,0,		"FSQRT" },
+[0x43] =	{ 0,0,		"FSINCOS" },
+[0x44] =	{ 0,0,		"FRNDINT" },
+[0x45] =	{ 0,0,		"FSCALE" },
+[0x46] =	{ 0,0,		"FSIN" },
+[0x47] =	{ 0,0,		"FCOS" },
 };
 
 static Optable optabDA[8+8] =
 {
-	0,0,		"FADDL	%e,F0",		/* 0x00 */
-	0,0,		"FMULL	%e,F0",		/* 0x01 */
-	0,0,		"FCOML	%e,F0",		/* 0x02 */
-	0,0,		"FCOMLP	%e,F0",		/* 0x03 */
-	0,0,		"FSUBL	%e,F0",		/* 0x04 */
-	0,0,		"FSUBRL	%e,F0",		/* 0x05 */
-	0,0,		"FDIVL	%e,F0",		/* 0x06 */
-	0,0,		"FDIVRL	%e,F0",		/* 0x07 */
-	0,0,		"",			/* 0x08 */
-	0,0,		"",			/* 0x09 */
-	0,0,		"",			/* 0x0a */
-	0,0,		"",			/* 0x0b */
-	0,0,		"",			/* 0x0c */
-	R1,0,		"FUCOMPP",		/* 0x0d */
+[0x00] =	{ 0,0,		"FADDL	%e,F0" },
+[0x01] =	{ 0,0,		"FMULL	%e,F0" },
+[0x02] =	{ 0,0,		"FCOML	%e,F0" },
+[0x03] =	{ 0,0,		"FCOMLP	%e,F0" },
+[0x04] =	{ 0,0,		"FSUBL	%e,F0" },
+[0x05] =	{ 0,0,		"FSUBRL	%e,F0" },
+[0x06] =	{ 0,0,		"FDIVL	%e,F0" },
+[0x07] =	{ 0,0,		"FDIVRL	%e,F0" },
+[0x08] =	{ 0,0,		"FCMOVCS	%f,F0" },
+[0x09] =	{ 0,0,		"FCMOVEQ	%f,F0" },
+[0x0a] =	{ 0,0,		"FCMOVLS	%f,F0" },
+[0x0b] =	{ 0,0,		"FCMOVUN	%f,F0" },
+[0x0d] =	{ Op_R1,0,		"FUCOMPP" },
 };
 
 static Optable optabDB[8+64] =
 {
-	0,0,		"FMOVL	%e,F0",		/* 0x00 */
-	0,0,		"",			/* 0x01 */
-	0,0,		"FMOVL	F0,%e",		/* 0x02 */
-	0,0,		"FMOVLP	F0,%e",		/* 0x03 */
-	0,0,		"",			/* 0x04 */
-	0,0,		"FMOVX	%e,F0",		/* 0x05 */
-	0,0,		"",			/* 0x06 */
-	0,0,		"FMOVXP	F0,%e",		/* 0x07 */
-	0,0,		"",			/* 0x08 */
-	0,0,		"",			/* 0x09 */
-	0,0,		"",			/* 0x0a */
-	0,0,		"",			/* 0x0b */
-	0,0,		"",			/* 0x0c */
-	0,0,		"",			/* 0x0d */
-	0,0,		"",			/* 0x0e */
-	0,0,		"",			/* 0x0f */
-	0,0,		"",			/* 0x10 */
-	0,0,		"",			/* 0x11 */
-	0,0,		"",			/* 0x12 */
-	0,0,		"",			/* 0x13 */
-	0,0,		"",			/* 0x14 */
-	0,0,		"",			/* 0x15 */
-	0,0,		"",			/* 0x16 */
-	0,0,		"",			/* 0x17 */
-	0,0,		"",			/* 0x18 */
-	0,0,		"",			/* 0x19 */
-	0,0,		"",			/* 0x1a */
-	0,0,		"",			/* 0x1b */
-	0,0,		"",			/* 0x1c */
-	0,0,		"",			/* 0x1d */
-	0,0,		"",			/* 0x1e */
-	0,0,		"",			/* 0x1f */
-	0,0,		"",			/* 0x20 */
-	0,0,		"",			/* 0x21 */
-	0,0,		"",			/* 0x22 */
-	0,0,		"",			/* 0x23 */
-	0,0,		"",			/* 0x24 */
-	0,0,		"",			/* 0x25 */
-	0,0,		"",			/* 0x26 */
-	0,0,		"",			/* 0x27 */
-	0,0,		"",			/* 0x28 */
-	0,0,		"",			/* 0x29 */
-	0,0,		"FCLEX",		/* 0x2a */
-	0,0,		"FINIT",		/* 0x2b */
+[0x00] =	{ 0,0,		"FMOVL	%e,F0" },
+[0x02] =	{ 0,0,		"FMOVL	F0,%e" },
+[0x03] =	{ 0,0,		"FMOVLP	F0,%e" },
+[0x05] =	{ 0,0,		"FMOVX	%e,F0" },
+[0x07] =	{ 0,0,		"FMOVXP	F0,%e" },
+[0x08] =	{ 0,0,		"FCMOVCC	F0,F0" },	/* Mod R/M = 11xx xxxx*/
+[0x09] =	{ 0,0,		"FCMOVCC	F1,F0" },
+[0x0a] =	{ 0,0,		"FCMOVCC	F2,F0" },
+[0x0b] =	{ 0,0,		"FCMOVCC	F3,F0" },
+[0x0c] =	{ 0,0,		"FCMOVCC	F4,F0" },
+[0x0d] =	{ 0,0,		"FCMOVCC	F5,F0" },
+[0x0e] =	{ 0,0,		"FCMOVCC	F6,F0" },
+[0x0f] =	{ 0,0,		"FCMOVCC	F7,F0" },
+[0x10] =	{ 0,0,		"FCMOVNE	F0,F0" },
+[0x11] =	{ 0,0,		"FCMOVNE	F1,F0" },
+[0x12] =	{ 0,0,		"FCMOVNE	F2,F0" },
+[0x13] =	{ 0,0,		"FCMOVNE	F3,F0" },
+[0x14] =	{ 0,0,		"FCMOVNE	F4,F0" },
+[0x15] =	{ 0,0,		"FCMOVNE	F5,F0" },
+[0x16] =	{ 0,0,		"FCMOVNE	F6,F0" },
+[0x17] =	{ 0,0,		"FCMOVNE	F7,F0" },
+[0x18] =	{ 0,0,		"FCMOVHI	F0,F0" },
+[0x19] =	{ 0,0,		"FCMOVHI	F1,F0" },
+[0x1a] =	{ 0,0,		"FCMOVHI	F2,F0" },
+[0x1b] =	{ 0,0,		"FCMOVHI	F3,F0" },
+[0x1c] =	{ 0,0,		"FCMOVHI	F4,F0" },
+[0x1d] =	{ 0,0,		"FCMOVHI	F5,F0" },
+[0x1e] =	{ 0,0,		"FCMOVHI	F6,F0" },
+[0x1f] =	{ 0,0,		"FCMOVHI	F7,F0" },
+[0x20] =	{ 0,0,		"FCMOVNU	F0,F0" },
+[0x21] =	{ 0,0,		"FCMOVNU	F1,F0" },
+[0x22] =	{ 0,0,		"FCMOVNU	F2,F0" },
+[0x23] =	{ 0,0,		"FCMOVNU	F3,F0" },
+[0x24] =	{ 0,0,		"FCMOVNU	F4,F0" },
+[0x25] =	{ 0,0,		"FCMOVNU	F5,F0" },
+[0x26] =	{ 0,0,		"FCMOVNU	F6,F0" },
+[0x27] =	{ 0,0,		"FCMOVNU	F7,F0" },
+[0x2a] =	{ 0,0,		"FCLEX" },
+[0x2b] =	{ 0,0,		"FINIT" },
+[0x30] =	{ 0,0,		"FUCOMI	F0,F0" },
+[0x31] =	{ 0,0,		"FUCOMI	F1,F0" },
+[0x32] =	{ 0,0,		"FUCOMI	F2,F0" },
+[0x33] =	{ 0,0,		"FUCOMI	F3,F0" },
+[0x34] =	{ 0,0,		"FUCOMI	F4,F0" },
+[0x35] =	{ 0,0,		"FUCOMI	F5,F0" },
+[0x36] =	{ 0,0,		"FUCOMI	F6,F0" },
+[0x37] =	{ 0,0,		"FUCOMI	F7,F0" },
+[0x38] =	{ 0,0,		"FCOMI	F0,F0" },
+[0x39] =	{ 0,0,		"FCOMI	F1,F0" },
+[0x3a] =	{ 0,0,		"FCOMI	F2,F0" },
+[0x3b] =	{ 0,0,		"FCOMI	F3,F0" },
+[0x3c] =	{ 0,0,		"FCOMI	F4,F0" },
+[0x3d] =	{ 0,0,		"FCOMI	F5,F0" },
+[0x3e] =	{ 0,0,		"FCOMI	F6,F0" },
+[0x3f] =	{ 0,0,		"FCOMI	F7,F0" },
 };
 
 static Optable optabDC[8+8] =
 {
-	0,0,		"FADDD	%e,F0",		/* 0x00 */
-	0,0,		"FMULD	%e,F0",		/* 0x01 */
-	0,0,		"FCOMD	%e,F0",		/* 0x02 */
-	0,0,		"FCOMDP	%e,F0",		/* 0x03 */
-	0,0,		"FSUBD	%e,F0",		/* 0x04 */
-	0,0,		"FSUBRD	%e,F0",		/* 0x05 */
-	0,0,		"FDIVD	%e,F0",		/* 0x06 */
-	0,0,		"FDIVRD	%e,F0",		/* 0x07 */
-	0,0,		"FADDD	F0,%f",		/* 0x08 */
-	0,0,		"FMULD	F0,%f",		/* 0x09 */
-	0,0,		"",			/* 0x0a */
-	0,0,		"",			/* 0x0b */
-	0,0,		"FSUBRD	F0,%f",		/* 0x0c */
-	0,0,		"FSUBD	F0,%f",		/* 0x0d */
-	0,0,		"FDIVRD	F0,%f",		/* 0x0e */
-	0,0,		"FDIVD	F0,%f",		/* 0x0f */
+[0x00] =	{ 0,0,		"FADDD	%e,F0" },
+[0x01] =	{ 0,0,		"FMULD	%e,F0" },
+[0x02] =	{ 0,0,		"FCOMD	%e,F0" },
+[0x03] =	{ 0,0,		"FCOMDP	%e,F0" },
+[0x04] =	{ 0,0,		"FSUBD	%e,F0" },
+[0x05] =	{ 0,0,		"FSUBRD	%e,F0" },
+[0x06] =	{ 0,0,		"FDIVD	%e,F0" },
+[0x07] =	{ 0,0,		"FDIVRD	%e,F0" },
+[0x08] =	{ 0,0,		"FADDD	F0,%f" },
+[0x09] =	{ 0,0,		"FMULD	F0,%f" },
+[0x0c] =	{ 0,0,		"FSUBRD	F0,%f" },
+[0x0d] =	{ 0,0,		"FSUBD	F0,%f" },
+[0x0e] =	{ 0,0,		"FDIVRD	F0,%f" },
+[0x0f] =	{ 0,0,		"FDIVD	F0,%f" },
 };
 
 static Optable optabDD[8+8] =
 {
-	0,0,		"FMOVD	%e,F0",		/* 0x00 */
-	0,0,		"",			/* 0x01 */
-	0,0,		"FMOVD	F0,%e",		/* 0x02 */
-	0,0,		"FMOVDP	F0,%e",		/* 0x03 */
-	0,0,		"FRSTOR%S %e",		/* 0x04 */
-	0,0,		"",			/* 0x05 */
-	0,0,		"FSAVE%S %e",		/* 0x06 */
-	0,0,		"FSTSW	%e",		/* 0x07 */
-	0,0,		"FFREED	%f",		/* 0x08 */
-	0,0,		"",			/* 0x09 */
-	0,0,		"FMOVD	%f,F0",		/* 0x0a */
-	0,0,		"FMOVDP	%f,F0",		/* 0x0b */
-	0,0,		"FUCOMD	%f,F0",		/* 0x0c */
-	0,0,		"FUCOMDP %f,F0",	/* 0x0d */
+[0x00] =	{ 0,0,		"FMOVD	%e,F0" },
+[0x02] =	{ 0,0,		"FMOVD	F0,%e" },
+[0x03] =	{ 0,0,		"FMOVDP	F0,%e" },
+[0x04] =	{ 0,0,		"FRSTOR%S %e" },
+[0x06] =	{ 0,0,		"FSAVE%S %e" },
+[0x07] =	{ 0,0,		"FSTSW	%e" },
+[0x08] =	{ 0,0,		"FFREED	%f" },
+[0x0a] =	{ 0,0,		"FMOVD	%f,F0" },
+[0x0b] =	{ 0,0,		"FMOVDP	%f,F0" },
+[0x0c] =	{ 0,0,		"FUCOMD	%f,F0" },
+[0x0d] =	{ 0,0,		"FUCOMDP %f,F0" },
 };
 
 static Optable optabDE[8+8] =
 {
-	0,0,		"FADDW	%e,F0",		/* 0x00 */
-	0,0,		"FMULW	%e,F0",		/* 0x01 */
-	0,0,		"FCOMW	%e,F0",		/* 0x02 */
-	0,0,		"FCOMWP	%e,F0",		/* 0x03 */
-	0,0,		"FSUBW	%e,F0",		/* 0x04 */
-	0,0,		"FSUBRW	%e,F0",		/* 0x05 */
-	0,0,		"FDIVW	%e,F0",		/* 0x06 */
-	0,0,		"FDIVRW	%e,F0",		/* 0x07 */
-	0,0,		"FADDDP	F0,%f",		/* 0x08 */
-	0,0,		"FMULDP	F0,%f",		/* 0x09 */
-	0,0,		"",			/* 0x0a */
-	R1,0,		"FCOMPDP",		/* 0x0b */
-	0,0,		"FSUBRDP F0,%f",	/* 0x0c */
-	0,0,		"FSUBDP	F0,%f",		/* 0x0d */
-	0,0,		"FDIVRDP F0,%f",	/* 0x0e */
-	0,0,		"FDIVDP	F0,%f",		/* 0x0f */
+[0x00] =	{ 0,0,		"FADDW	%e,F0" },
+[0x01] =	{ 0,0,		"FMULW	%e,F0" },
+[0x02] =	{ 0,0,		"FCOMW	%e,F0" },
+[0x03] =	{ 0,0,		"FCOMWP	%e,F0" },
+[0x04] =	{ 0,0,		"FSUBW	%e,F0" },
+[0x05] =	{ 0,0,		"FSUBRW	%e,F0" },
+[0x06] =	{ 0,0,		"FDIVW	%e,F0" },
+[0x07] =	{ 0,0,		"FDIVRW	%e,F0" },
+[0x08] =	{ 0,0,		"FADDDP	F0,%f" },
+[0x09] =	{ 0,0,		"FMULDP	F0,%f" },
+[0x0b] =	{ Op_R1,0,		"FCOMPDP" },
+[0x0c] =	{ 0,0,		"FSUBRDP F0,%f" },
+[0x0d] =	{ 0,0,		"FSUBDP	F0,%f" },
+[0x0e] =	{ 0,0,		"FDIVRDP F0,%f" },
+[0x0f] =	{ 0,0,		"FDIVDP	F0,%f" },
 };
 
 static Optable optabDF[8+8] =
 {
-	0,0,		"FMOVW	%e,F0",		/* 0x00 */
-	0,0,		"",			/* 0x01 */
-	0,0,		"FMOVW	F0,%e",		/* 0x02 */
-	0,0,		"FMOVWP	F0,%e",		/* 0x03 */
-	0,0,		"FBLD	%e",		/* 0x04 */
-	0,0,		"FMOVL	%e,F0",		/* 0x05 */
-	0,0,		"FBSTP	%e",		/* 0x06 */
-	0,0,		"FMOVLP	F0,%e",		/* 0x07 */
-	0,0,		"",			/* 0x08 */
-	0,0,		"",			/* 0x09 */
-	0,0,		"",			/* 0x0a */
-	0,0,		"",			/* 0x0b */
-	R0,0,		"FSTSW	%OAX",		/* 0x0c */
+[0x00] =	{ 0,0,		"FMOVW	%e,F0" },
+[0x02] =	{ 0,0,		"FMOVW	F0,%e" },
+[0x03] =	{ 0,0,		"FMOVWP	F0,%e" },
+[0x04] =	{ 0,0,		"FBLD	%e" },
+[0x05] =	{ 0,0,		"FMOVL	%e,F0" },
+[0x06] =	{ 0,0,		"FBSTP	%e" },
+[0x07] =	{ 0,0,		"FMOVLP	F0,%e" },
+[0x0c] =	{ Op_R0,0,		"FSTSW	%OAX" },
+[0x0d] =	{ 0,0,		"FUCOMIP	F0,%f" },
+[0x0e] =	{ 0,0,		"FCOMIP	F0,%f" },
 };
 
 static Optable optabF6[8] =
 {
-	Ib,0,		"TESTB	%i,%e",		/* 0x00 */
-	0,0,		"",			/* 0x01 */
-	0,0,		"NOTB	%e",		/* 0x02 */
-	0,0,		"NEGB	%e",		/* 0x03 */
-	0,0,		"MULB	AL,%e",		/* 0x04 */
-	0,0,		"IMULB	AL,%e",		/* 0x05 */
-	0,0,		"DIVB	AL,%e",		/* 0x06 */
-	0,0,		"IDIVB	AL,%e",		/* 0x07 */
+[0x00] =	{ Ib,0,		"TESTB	%i,%e" },
+[0x02] =	{ 0,0,		"NOTB	%e" },
+[0x03] =	{ 0,0,		"NEGB	%e" },
+[0x04] =	{ 0,0,		"MULB	AL,%e" },
+[0x05] =	{ 0,0,		"IMULB	AL,%e" },
+[0x06] =	{ 0,0,		"DIVB	AL,%e" },
+[0x07] =	{ 0,0,		"IDIVB	AL,%e" },
 };
 
 static Optable optabF7[8] =
 {
-	Iwd,0,		"TEST%S	%i,%e",		/* 0x00 */
-	0,0,		"",			/* 0x01 */
-	0,0,		"NOT%S	%e",		/* 0x02 */
-	0,0,		"NEG%S	%e",		/* 0x03 */
-	0,0,		"MUL%S	%OAX,%e",	/* 0x04 */
-	0,0,		"IMUL%S	%OAX,%e",	/* 0x05 */
-	0,0,		"DIV%S	%OAX,%e",	/* 0x06 */
-	0,0,		"IDIV%S	%OAX,%e",	/* 0x07 */
+[0x00] =	{ Iwd,0,		"TEST%S	%i,%e" },
+[0x02] =	{ 0,0,		"NOT%S	%e" },
+[0x03] =	{ 0,0,		"NEG%S	%e" },
+[0x04] =	{ 0,0,		"MUL%S	%OAX,%e" },
+[0x05] =	{ 0,0,		"IMUL%S	%OAX,%e" },
+[0x06] =	{ 0,0,		"DIV%S	%OAX,%e" },
+[0x07] =	{ 0,0,		"IDIV%S	%OAX,%e" },
 };
 
 static Optable optabFE[8] =
 {
-	0,0,		"INCB	%e",		/* 0x00 */
-	0,0,		"DECB	%e",		/* 0x01 */
+[0x00] =	{ 0,0,		"INCB	%e" },
+[0x01] =	{ 0,0,		"DECB	%e" },
 };
 
 static Optable optabFF[8] =
 {
-	0,0,		"INC%S	%e",		/* 0x00 */
-	0,0,		"DEC%S	%e",		/* 0x01 */
-	JUMP,0,		"CALL*%S %e",		/* 0x02 */
-	JUMP,0,		"CALLF*%S %e",		/* 0x03 */
-	JUMP,0,		"JMP*%S	%e",		/* 0x04 */
-	JUMP,0,		"JMPF*%S %e",		/* 0x05 */
-	0,0,		"PUSHL	%e",		/* 0x06 */
+[0x00] =	{ 0,0,		"INC%S	%e" },
+[0x01] =	{ 0,0,		"DEC%S	%e" },
+[0x02] =	{ JUMP,0,		"CALL*	%e" },
+[0x03] =	{ JUMP,0,		"CALLF*	%e" },
+[0x04] =	{ JUMP,0,		"JMP*	%e" },
+[0x05] =	{ JUMP,0,		"JMPF*	%e" },
+[0x06] =	{ 0,0,		"PUSHL	%e" },
 };
 
-static Optable optable[256] =
+static Optable optable[256+2] =
 {
-	RMB,0,		"ADDB	%r,%e",		/* 0x00 */
-	RM,0,		"ADD%S	%r,%e",		/* 0x01 */
-	RMB,0,		"ADDB	%e,%r",		/* 0x02 */
-	RM,0,		"ADD%S	%e,%r",		/* 0x03 */
-	Ib,0,		"ADDB	%i,AL",		/* 0x04 */
-	Iwd,0,		"ADD%S	%i,%OAX",	/* 0x05 */
-	0,0,		"PUSHL	ES",		/* 0x06 */
-	0,0,		"POPL	ES",		/* 0x07 */
-	RMB,0,		"ORB	%r,%e",		/* 0x08 */
-	RM,0,		"OR%S	%r,%e",		/* 0x09 */
-	RMB,0,		"ORB	%e,%r",		/* 0x0a */
-	RM,0,		"OR%S	%e,%r",		/* 0x0b */
-	Ib,0,		"ORB	%i,AL",		/* 0x0c */
-	Iwd,0,		"OR%S	%i,%OAX",	/* 0x0d */
-	0,0,		"PUSHL	CS",		/* 0x0e */
-	AUX,0,		optab0F,		/* 0x0f */
-	RMB,0,		"ADCB	%r,%e",		/* 0x10 */
-	RM,0,		"ADC%S	%r,%e",		/* 0x11 */
-	RMB,0,		"ADCB	%e,%r",		/* 0x12 */
-	RM,0,		"ADC%S	%e,%r",		/* 0x13 */
-	Ib,0,		"ADCB	%i,AL",		/* 0x14 */
-	Iwd,0,		"ADC%S	%i,%OAX",	/* 0x15 */
-	0,0,		"PUSHL	SS",		/* 0x16 */
-	0,0,		"POPL	SS",		/* 0x17 */
-	RMB,0,		"SBBB	%r,%e",		/* 0x18 */
-	RM,0,		"SBB%S	%r,%e",		/* 0x19 */
-	RMB,0,		"SBBB	%e,%r",		/* 0x1a */
-	RM,0,		"SBB%S	%e,%r",		/* 0x1b */
-	Ib,0,		"SBBB	%i,AL",		/* 0x1c */
-	Iwd,0,		"SBB%S	%i,%OAX",	/* 0x1d */
-	0,0,		"PUSHL	DS",		/* 0x1e */
-	0,0,		"POPL	DS",		/* 0x1f */
-	RMB,0,		"ANDB	%r,%e",		/* 0x20 */
-	RM,0,		"AND%S	%r,%e",		/* 0x21 */
-	RMB,0,		"ANDB	%e,%r",		/* 0x22 */
-	RM,0,		"AND%S	%e,%r",		/* 0x23 */
-	Ib,0,		"ANDB	%i,AL",		/* 0x24 */
-	Iwd,0,		"AND%S	%i,%OAX",	/* 0x25 */
-	SEG,0,		"ES:",			/* 0x26 */
-	0,0,		"DAA",			/* 0x27 */
-	RMB,0,		"SUBB	%r,%e",		/* 0x28 */
-	RM,0,		"SUB%S	%r,%e",		/* 0x29 */
-	RMB,0,		"SUBB	%e,%r",		/* 0x2a */
-	RM,0,		"SUB%S	%e,%r",		/* 0x2b */
-	Ib,0,		"SUBB	%i,AL",		/* 0x2c */
-	Iwd,0,		"SUB%S	%i,%OAX",	/* 0x2d */
-	SEG,0,		"CS:",			/* 0x2e */
-	0,0,		"DAS",			/* 0x2f */
-	RMB,0,		"XORB	%r,%e",		/* 0x30 */
-	RM,0,		"XOR%S	%r,%e",		/* 0x31 */
-	RMB,0,		"XORB	%e,%r",		/* 0x32 */
-	RM,0,		"XOR%S	%e,%r",		/* 0x33 */
-	Ib,0,		"XORB	%i,AL",		/* 0x34 */
-	Iwd,0,		"XOR%S	%i,%OAX",	/* 0x35 */
-	SEG,0,		"SS:",			/* 0x36 */
-	0,0,		"AAA",			/* 0x37 */
-	RMB,0,		"CMPB	%r,%e",		/* 0x38 */
-	RM,0,		"CMP%S	%r,%e",		/* 0x39 */
-	RMB,0,		"CMPB	%e,%r",		/* 0x3a */
-	RM,0,		"CMP%S	%e,%r",		/* 0x3b */
-	Ib,0,		"CMPB	%i,AL",		/* 0x3c */
-	Iwd,0,		"CMP%S	%i,%OAX",	/* 0x3d */
-	SEG,0,		"DS:",			/* 0x3e */
-	0,0,		"AAS",			/* 0x3f */
-	0,0,		"INC%S	%OAX",		/* 0x40 */
-	0,0,		"INC%S	%OCX",		/* 0x41 */
-	0,0,		"INC%S	%ODX",		/* 0x42 */
-	0,0,		"INC%S	%OBX",		/* 0x43 */
-	0,0,		"INC%S	%OSP",		/* 0x44 */
-	0,0,		"INC%S	%OBP",		/* 0x45 */
-	0,0,		"INC%S	%OSI",		/* 0x46 */
-	0,0,		"INC%S	%ODI",		/* 0x47 */
-	0,0,		"DEC%S	%OAX",		/* 0x48 */
-	0,0,		"DEC%S	%OCX",		/* 0x49 */
-	0,0,		"DEC%S	%ODX",		/* 0x4a */
-	0,0,		"DEC%S	%OBX",		/* 0x4b */
-	0,0,		"DEC%S	%OSP",		/* 0x4c */
-	0,0,		"DEC%S	%OBP",		/* 0x4d */
-	0,0,		"DEC%S	%OSI",		/* 0x4e */
-	0,0,		"DEC%S	%ODI",		/* 0x4f */
-	0,0,		"PUSH%S	%OAX",		/* 0x50 */
-	0,0,		"PUSH%S	%OCX",		/* 0x51 */
-	0,0,		"PUSH%S	%ODX",		/* 0x52 */
-	0,0,		"PUSH%S	%OBX",		/* 0x53 */
-	0,0,		"PUSH%S	%OSP",		/* 0x54 */
-	0,0,		"PUSH%S	%OBP",		/* 0x55 */
-	0,0,		"PUSH%S	%OSI",		/* 0x56 */
-	0,0,		"PUSH%S	%ODI",		/* 0x57 */
-	0,0,		"POP%S	%OAX",		/* 0x58 */
-	0,0,		"POP%S	%OCX",		/* 0x59 */
-	0,0,		"POP%S	%ODX",		/* 0x5a */
-	0,0,		"POP%S	%OBX",		/* 0x5b */
-	0,0,		"POP%S	%OSP",		/* 0x5c */
-	0,0,		"POP%S	%OBP",		/* 0x5d */
-	0,0,		"POP%S	%OSI",		/* 0x5e */
-	0,0,		"POP%S	%ODI",		/* 0x5f */
-	0,0,		"PUSHA%S",		/* 0x60 */
-	0,0,		"POPA%S",		/* 0x61 */
-	RMM,0,		"BOUND	%e,%r",		/* 0x62 */
-	RM,0,		"ARPL	%r,%e",		/* 0x63 */
-	SEG,0,		"FS:",			/* 0x64 */
-	SEG,0,		"GS:",			/* 0x65 */
-	OPOVER,0,	"",			/* 0x66 */
-	ADDOVER,0,	"",			/* 0x67 */
-	Iwd,0,		"PUSH%S	%i",		/* 0x68 */
-	RM,Iwd,		"IMUL%S	%e,%i,%r",	/* 0x69 */
-	Ib,0,		"PUSH%S	%i",		/* 0x6a */
-	RM,Ibs,		"IMUL%S	%e,%i,%r",	/* 0x6b */
-	0,0,		"INSB	DX,(%ODI)",	/* 0x6c */
-	0,0,		"INS%S	DX,(%ODI)",	/* 0x6d */
-	0,0,		"OUTSB	(%ASI),DX",	/* 0x6e */
-	0,0,		"OUTS%S	(%ASI),DX",	/* 0x6f */
-	Jbs,0,		"JOS	%p",		/* 0x70 */
-	Jbs,0,		"JOC	%p",		/* 0x71 */
-	Jbs,0,		"JCS	%p",		/* 0x72 */
-	Jbs,0,		"JCC	%p",		/* 0x73 */
-	Jbs,0,		"JEQ	%p",		/* 0x74 */
-	Jbs,0,		"JNE	%p",		/* 0x75 */
-	Jbs,0,		"JLS	%p",		/* 0x76 */
-	Jbs,0,		"JHI	%p",		/* 0x77 */
-	Jbs,0,		"JMI	%p",		/* 0x78 */
-	Jbs,0,		"JPL	%p",		/* 0x79 */
-	Jbs,0,		"JPS	%p",		/* 0x7a */
-	Jbs,0,		"JPC	%p",		/* 0x7b */
-	Jbs,0,		"JLT	%p",		/* 0x7c */
-	Jbs,0,		"JGE	%p",		/* 0x7d */
-	Jbs,0,		"JLE	%p",		/* 0x7e */
-	Jbs,0,		"JGT	%p",		/* 0x7f */
-	RMOPB,0,	optab80,		/* 0x80 */
-	RMOP,0,		optab81,		/* 0x81 */
-	0,0,		"",			/* 0x82 */
-	RMOP,0,		optab83,		/* 0x83 */
-	RMB,0,		"TESTB	%r,%e",		/* 0x84 */
-	RM,0,		"TEST%S	%r,%e",		/* 0x85 */
-	RMB,0,		"XCHGB	%r,%e",		/* 0x86 */
-	RM,0,		"XCHG%S	%r,%e",		/* 0x87 */
-	RMB,0,		"MOVB	%r,%e",		/* 0x88 */
-	RM,0,		"MOV%S	%r,%e",		/* 0x89 */
-	RMB,0,		"MOVB	%e,%r",		/* 0x8a */
-	RM,0,		"MOV%S	%e,%r",		/* 0x8b */
-	RM,0,		"MOVW	%g,%e",		/* 0x8c */
-	RM,0,		"LEA	%e,%r",		/* 0x8d */
-	RM,0,		"MOVW	%e,%g",		/* 0x8e */
-	RM,0,		"POP%S	%e",		/* 0x8f */
-	0,0,		"NOP",			/* 0x90 */
-	0,0,		"XCHG	%OCX,%OAX",	/* 0x91 */
-	0,0,		"XCHG	%OCX,%OAX",	/* 0x92 */
-	0,0,		"XCHG	%OCX,%OAX",	/* 0x93 */
-	0,0,		"XCHG	%OSP,%OAX",	/* 0x94 */
-	0,0,		"XCHG	%OBP,%OAX",	/* 0x95 */
-	0,0,		"XCHG	%OSI,%OAX",	/* 0x96 */
-	0,0,		"XCHG	%ODI,%OAX",	/* 0x97 */
-	0,0,		"%X",			/* 0x98 */	/* miserable CBW or CWDE */
-	0,0,		"%x",			/* 0x99 */	/* idiotic CWD or CDQ */
-	PTR,0,		"CALL%S	%d",		/* 0x9a */
-	0,0,		"WAIT",			/* 0x9b */
-	0,0,		"PUSHF",		/* 0x9c */
-	0,0,		"POPF",			/* 0x9d */
-	0,0,		"SAHF",			/* 0x9e */
-	0,0,		"LAHF",			/* 0x9f */
-	Awd,0,		"MOVB	%i,AL",		/* 0xa0 */
-	Awd,0,		"MOV%S	%i,%OAX",	/* 0xa1 */
-	Awd,0,		"MOVB	AL,%i",		/* 0xa2 */
-	Awd,0,		"MOV%S	%OAX,%i",	/* 0xa3 */
-	0,0,		"MOVSB	(%ASI),(%ADI)",	/* 0xa4 */
-	0,0,		"MOVS%S	(%ASI),(%ADI)",	/* 0xa5 */
-	0,0,		"CMPSB	(%ASI),(%ADI)",	/* 0xa6 */
-	0,0,		"CMPS%S	(%ASI),(%ADI)",	/* 0xa7 */
-	Ib,0,		"TESTB	%i,AL",		/* 0xa8 */
-	Iwd,0,		"TEST%S	%i,%OAX",	/* 0xa9 */
-	0,0,		"STOSB	AL,(%ADI)",	/* 0xaa */
-	0,0,		"STOS%S	%OAX,(%ADI)",	/* 0xab */
-	0,0,		"LODSB	(%ASI),AL",	/* 0xac */
-	0,0,		"LODS%S	(%ASI),%OAX",	/* 0xad */
-	0,0,		"SCASB	(%ADI),AL",	/* 0xae */
-	0,0,		"SCAS%S	(%ADI),%OAX",	/* 0xaf */
-	Ib,0,		"MOVB	%i,AL",		/* 0xb0 */
-	Ib,0,		"MOVB	%i,CL",		/* 0xb1 */
-	Ib,0,		"MOVB	%i,DL",		/* 0xb2 */
-	Ib,0,		"MOVB	%i,BL",		/* 0xb3 */
-	Ib,0,		"MOVB	%i,AH",		/* 0xb4 */
-	Ib,0,		"MOVB	%i,CH",		/* 0xb5 */
-	Ib,0,		"MOVB	%i,DH",		/* 0xb6 */
-	Ib,0,		"MOVB	%i,BH",		/* 0xb7 */
-	Iwd,0,		"MOV%S	%i,%OAX",	/* 0xb8 */
-	Iwd,0,		"MOV%S	%i,%OCX",	/* 0xb9 */
-	Iwd,0,		"MOV%S	%i,%ODX",	/* 0xba */
-	Iwd,0,		"MOV%S	%i,%OBX",	/* 0xbb */
-	Iwd,0,		"MOV%S	%i,%OSP",	/* 0xbc */
-	Iwd,0,		"MOV%S	%i,%OBP",	/* 0xbd */
-	Iwd,0,		"MOV%S	%i,%OSI",	/* 0xbe */
-	Iwd,0,		"MOV%S	%i,%ODI",	/* 0xbf */
-	RMOPB,0,	optabC0,		/* 0xc0 */
-	RMOP,0,		optabC1,		/* 0xc1 */
-	Iw,0,		"RET	%i",		/* 0xc2 */
-	RET,0,		"RET",			/* 0xc3 */
-	RM,0,		"LES	%e,%r",		/* 0xc4 */
-	RM,0,		"LDS	%e,%r",		/* 0xc5 */
-	RMB,Ib,		"MOVB	%i,%e",		/* 0xc6 */
-	RM,Iwd,		"MOV%S	%i,%e",		/* 0xc7 */
-	Iw2,Ib,		"ENTER	%i,%I",		/* 0xc8 */	/* loony ENTER */
-	RET,0,		"LEAVE",		/* 0xc9 */	/* bizarre LEAVE */
-	Iw,0,		"RETF	%i",		/* 0xca */
-	RET,0,		"RETF",			/* 0xcb */
-	0,0,		"INT	3",		/* 0xcc */
-	Ib,0,		"INTB	%i",		/* 0xcd */
-	0,0,		"INTO",			/* 0xce */
-	0,0,		"IRET",			/* 0xcf */
-	RMOPB,0,	optabD0,		/* 0xd0 */
-	RMOP,0,		optabD1,		/* 0xd1 */
-	RMOPB,0,	optabD2,		/* 0xd2 */
-	RMOP,0,		optabD3,		/* 0xd3 */
-	OA,0,		"AAM",			/* 0xd4 */
-	OA,0,		"AAD",			/* 0xd5 */
-	0,0,		"",			/* 0xd6 */
-	0,0,		"XLAT",			/* 0xd7 */
-	FRMOP,0,	optabD8,		/* 0xd8 */
-	FRMEX,0,	optabD9,		/* 0xd9 */
-	FRMOP,0,	optabDA,		/* 0xda */
-	FRMEX,0,	optabDB,		/* 0xdb */
-	FRMOP,0,	optabDC,		/* 0xdc */
-	FRMOP,0,	optabDD,		/* 0xdd */
-	FRMOP,0,	optabDE,		/* 0xde */
-	FRMOP,0,	optabDF,		/* 0xdf */
-	Jbs,0,		"LOOPNE	%p",		/* 0xe0 */
-	Jbs,0,		"LOOPE	%p",		/* 0xe1 */
-	Jbs,0,		"LOOP	%p",		/* 0xe2 */
-	Jbs,0,		"JCXZ	%p",		/* 0xe3 */
-	Ib,0,		"INB	%i,AL",		/* 0xe4 */
-	Ib,0,		"IN%S	%i,%OAX",	/* 0xe5 */
-	Ib,0,		"OUTB	AL,%i",		/* 0xe6 */
-	Ib,0,		"OUT%S	%OAX,%i",	/* 0xe7 */
-	Iwds,0,		"CALL	%p",		/* 0xe8 */
-	Iwds,0,		"JMP	%p",		/* 0xe9 */
-	PTR,0,		"JMP	%d",		/* 0xea */
-	Jbs,0,		"JMP	%p",		/* 0xeb */
-	0,0,		"INB	DX,AL",		/* 0xec */
-	0,0,		"IN%S	DX,%OAX",	/* 0xed */
-	0,0,		"OUTB	AL,DX",		/* 0xee */
-	0,0,		"OUT%S	%OAX,DX",	/* 0xef */
-	PRE,0,		"LOCK",			/* 0xf0 */
-	0,0,		"",			/* 0xf1 */	
-	PRE,0,		"REPNE",		/* 0xf2 */
-	PRE,0,		"REP",			/* 0xf3 */
-	0,0,		"HALT",			/* 0xf4 */
-	0,0,		"CMC",			/* 0xf5 */
-	RMOPB,0,	optabF6,		/* 0xf6 */
-	RMOP,0,		optabF7,		/* 0xf7 */
-	0,0,		"CLC",			/* 0xf8 */
-	0,0,		"STC",			/* 0xf9 */
-	0,0,		"CLI",			/* 0xfa */
-	0,0,		"STI",			/* 0xfb */
-	0,0,		"CLD",			/* 0xfc */
-	0,0,		"STD",			/* 0xfd */
-	RMOPB,0,	optabFE,		/* 0xfe */
-	RMOP,0,		optabFF,		/* 0xff */
+[0x00] =	{ RMB,0,		"ADDB	%r,%e" },
+[0x01] =	{ RM,0,		"ADD%S	%r,%e" },
+[0x02] =	{ RMB,0,		"ADDB	%e,%r" },
+[0x03] =	{ RM,0,		"ADD%S	%e,%r" },
+[0x04] =	{ Ib,0,		"ADDB	%i,AL" },
+[0x05] =	{ Iwd,0,		"ADD%S	%i,%OAX" },
+[0x06] =	{ 0,0,		"PUSHL	ES" },
+[0x07] =	{ 0,0,		"POPL	ES" },
+[0x08] =	{ RMB,0,		"ORB	%r,%e" },
+[0x09] =	{ RM,0,		"OR%S	%r,%e" },
+[0x0a] =	{ RMB,0,		"ORB	%e,%r" },
+[0x0b] =	{ RM,0,		"OR%S	%e,%r" },
+[0x0c] =	{ Ib,0,		"ORB	%i,AL" },
+[0x0d] =	{ Iwd,0,		"OR%S	%i,%OAX" },
+[0x0e] =	{ 0,0,		"PUSHL	CS" },
+[0x0f] =	{ AUXMM,0,	optab0F },
+[0x10] =	{ RMB,0,		"ADCB	%r,%e" },
+[0x11] =	{ RM,0,		"ADC%S	%r,%e" },
+[0x12] =	{ RMB,0,		"ADCB	%e,%r" },
+[0x13] =	{ RM,0,		"ADC%S	%e,%r" },
+[0x14] =	{ Ib,0,		"ADCB	%i,AL" },
+[0x15] =	{ Iwd,0,		"ADC%S	%i,%OAX" },
+[0x16] =	{ 0,0,		"PUSHL	SS" },
+[0x17] =	{ 0,0,		"POPL	SS" },
+[0x18] =	{ RMB,0,		"SBBB	%r,%e" },
+[0x19] =	{ RM,0,		"SBB%S	%r,%e" },
+[0x1a] =	{ RMB,0,		"SBBB	%e,%r" },
+[0x1b] =	{ RM,0,		"SBB%S	%e,%r" },
+[0x1c] =	{ Ib,0,		"SBBB	%i,AL" },
+[0x1d] =	{ Iwd,0,		"SBB%S	%i,%OAX" },
+[0x1e] =	{ 0,0,		"PUSHL	DS" },
+[0x1f] =	{ 0,0,		"POPL	DS" },
+[0x20] =	{ RMB,0,		"ANDB	%r,%e" },
+[0x21] =	{ RM,0,		"AND%S	%r,%e" },
+[0x22] =	{ RMB,0,		"ANDB	%e,%r" },
+[0x23] =	{ RM,0,		"AND%S	%e,%r" },
+[0x24] =	{ Ib,0,		"ANDB	%i,AL" },
+[0x25] =	{ Iwd,0,		"AND%S	%i,%OAX" },
+[0x26] =	{ SEG,0,		"ES:" },
+[0x27] =	{ 0,0,		"DAA" },
+[0x28] =	{ RMB,0,		"SUBB	%r,%e" },
+[0x29] =	{ RM,0,		"SUB%S	%r,%e" },
+[0x2a] =	{ RMB,0,		"SUBB	%e,%r" },
+[0x2b] =	{ RM,0,		"SUB%S	%e,%r" },
+[0x2c] =	{ Ib,0,		"SUBB	%i,AL" },
+[0x2d] =	{ Iwd,0,		"SUB%S	%i,%OAX" },
+[0x2e] =	{ SEG,0,		"CS:" },
+[0x2f] =	{ 0,0,		"DAS" },
+[0x30] =	{ RMB,0,		"XORB	%r,%e" },
+[0x31] =	{ RM,0,		"XOR%S	%r,%e" },
+[0x32] =	{ RMB,0,		"XORB	%e,%r" },
+[0x33] =	{ RM,0,		"XOR%S	%e,%r" },
+[0x34] =	{ Ib,0,		"XORB	%i,AL" },
+[0x35] =	{ Iwd,0,		"XOR%S	%i,%OAX" },
+[0x36] =	{ SEG,0,		"SS:" },
+[0x37] =	{ 0,0,		"AAA" },
+[0x38] =	{ RMB,0,		"CMPB	%r,%e" },
+[0x39] =	{ RM,0,		"CMP%S	%r,%e" },
+[0x3a] =	{ RMB,0,		"CMPB	%e,%r" },
+[0x3b] =	{ RM,0,		"CMP%S	%e,%r" },
+[0x3c] =	{ Ib,0,		"CMPB	%i,AL" },
+[0x3d] =	{ Iwd,0,		"CMP%S	%i,%OAX" },
+[0x3e] =	{ SEG,0,		"DS:" },
+[0x3f] =	{ 0,0,		"AAS" },
+[0x40] =	{ 0,0,		"INC%S	%OAX" },
+[0x41] =	{ 0,0,		"INC%S	%OCX" },
+[0x42] =	{ 0,0,		"INC%S	%ODX" },
+[0x43] =	{ 0,0,		"INC%S	%OBX" },
+[0x44] =	{ 0,0,		"INC%S	%OSP" },
+[0x45] =	{ 0,0,		"INC%S	%OBP" },
+[0x46] =	{ 0,0,		"INC%S	%OSI" },
+[0x47] =	{ 0,0,		"INC%S	%ODI" },
+[0x48] =	{ 0,0,		"DEC%S	%OAX" },
+[0x49] =	{ 0,0,		"DEC%S	%OCX" },
+[0x4a] =	{ 0,0,		"DEC%S	%ODX" },
+[0x4b] =	{ 0,0,		"DEC%S	%OBX" },
+[0x4c] =	{ 0,0,		"DEC%S	%OSP" },
+[0x4d] =	{ 0,0,		"DEC%S	%OBP" },
+[0x4e] =	{ 0,0,		"DEC%S	%OSI" },
+[0x4f] =	{ 0,0,		"DEC%S	%ODI" },
+[0x50] =	{ 0,0,		"PUSH%S	%OAX" },
+[0x51] =	{ 0,0,		"PUSH%S	%OCX" },
+[0x52] =	{ 0,0,		"PUSH%S	%ODX" },
+[0x53] =	{ 0,0,		"PUSH%S	%OBX" },
+[0x54] =	{ 0,0,		"PUSH%S	%OSP" },
+[0x55] =	{ 0,0,		"PUSH%S	%OBP" },
+[0x56] =	{ 0,0,		"PUSH%S	%OSI" },
+[0x57] =	{ 0,0,		"PUSH%S	%ODI" },
+[0x58] =	{ 0,0,		"POP%S	%OAX" },
+[0x59] =	{ 0,0,		"POP%S	%OCX" },
+[0x5a] =	{ 0,0,		"POP%S	%ODX" },
+[0x5b] =	{ 0,0,		"POP%S	%OBX" },
+[0x5c] =	{ 0,0,		"POP%S	%OSP" },
+[0x5d] =	{ 0,0,		"POP%S	%OBP" },
+[0x5e] =	{ 0,0,		"POP%S	%OSI" },
+[0x5f] =	{ 0,0,		"POP%S	%ODI" },
+[0x60] =	{ 0,0,		"PUSHA%S" },
+[0x61] =	{ 0,0,		"POPA%S" },
+[0x62] =	{ RMM,0,		"BOUND	%e,%r" },
+[0x63] =	{ RM,0,		"ARPL	%r,%e" },
+[0x64] =	{ SEG,0,		"FS:" },
+[0x65] =	{ SEG,0,		"GS:" },
+[0x66] =	{ OPOVER,0,	"" },
+[0x67] =	{ ADDOVER,0,	"" },
+[0x68] =	{ Iwd,0,		"PUSH%S	%i" },
+[0x69] =	{ RM,Iwd,		"IMUL%S	%e,%i,%r" },
+[0x6a] =	{ Ib,0,		"PUSH%S	%i" },
+[0x6b] =	{ RM,Ibs,		"IMUL%S	%e,%i,%r" },
+[0x6c] =	{ 0,0,		"INSB	DX,(%ODI)" },
+[0x6d] =	{ 0,0,		"INS%S	DX,(%ODI)" },
+[0x6e] =	{ 0,0,		"OUTSB	(%ASI),DX" },
+[0x6f] =	{ 0,0,		"OUTS%S	(%ASI),DX" },
+[0x70] =	{ Jbs,0,		"JOS	%p" },
+[0x71] =	{ Jbs,0,		"JOC	%p" },
+[0x72] =	{ Jbs,0,		"JCS	%p" },
+[0x73] =	{ Jbs,0,		"JCC	%p" },
+[0x74] =	{ Jbs,0,		"JEQ	%p" },
+[0x75] =	{ Jbs,0,		"JNE	%p" },
+[0x76] =	{ Jbs,0,		"JLS	%p" },
+[0x77] =	{ Jbs,0,		"JHI	%p" },
+[0x78] =	{ Jbs,0,		"JMI	%p" },
+[0x79] =	{ Jbs,0,		"JPL	%p" },
+[0x7a] =	{ Jbs,0,		"JPS	%p" },
+[0x7b] =	{ Jbs,0,		"JPC	%p" },
+[0x7c] =	{ Jbs,0,		"JLT	%p" },
+[0x7d] =	{ Jbs,0,		"JGE	%p" },
+[0x7e] =	{ Jbs,0,		"JLE	%p" },
+[0x7f] =	{ Jbs,0,		"JGT	%p" },
+[0x80] =	{ RMOPB,0,	optab80 },
+[0x81] =	{ RMOP,0,		optab81 },
+[0x83] =	{ RMOP,0,		optab83 },
+[0x84] =	{ RMB,0,		"TESTB	%r,%e" },
+[0x85] =	{ RM,0,		"TEST%S	%r,%e" },
+[0x86] =	{ RMB,0,		"XCHGB	%r,%e" },
+[0x87] =	{ RM,0,		"XCHG%S	%r,%e" },
+[0x88] =	{ RMB,0,		"MOVB	%r,%e" },
+[0x89] =	{ RM,0,		"MOV%S	%r,%e" },
+[0x8a] =	{ RMB,0,		"MOVB	%e,%r" },
+[0x8b] =	{ RM,0,		"MOV%S	%e,%r" },
+[0x8c] =	{ RM,0,		"MOVW	%g,%e" },
+[0x8d] =	{ RM,0,		"LEA%S	%e,%r" },
+[0x8e] =	{ RM,0,		"MOVW	%e,%g" },
+[0x8f] =	{ RM,0,		"POP%S	%e" },
+[0x90] =	{ 0,0,		"NOP" },
+[0x91] =	{ 0,0,		"XCHG	%OCX,%OAX" },
+[0x92] =	{ 0,0,		"XCHG	%ODX,%OAX" },
+[0x93] =	{ 0,0,		"XCHG	%OBX,%OAX" },
+[0x94] =	{ 0,0,		"XCHG	%OSP,%OAX" },
+[0x95] =	{ 0,0,		"XCHG	%OBP,%OAX" },
+[0x96] =	{ 0,0,		"XCHG	%OSI,%OAX" },
+[0x97] =	{ 0,0,		"XCHG	%ODI,%OAX" },
+[0x98] =	{ 0,0,		"%W" },			/* miserable CBW or CWDE */
+[0x99] =	{ 0,0,		"%w" },			/* idiotic CWD or CDQ */
+[0x9a] =	{ PTR,0,		"CALL%S	%d" },
+[0x9b] =	{ 0,0,		"WAIT" },
+[0x9c] =	{ 0,0,		"PUSHF" },
+[0x9d] =	{ 0,0,		"POPF" },
+[0x9e] =	{ 0,0,		"SAHF" },
+[0x9f] =	{ 0,0,		"LAHF" },
+[0xa0] =	{ Awd,0,		"MOVB	%i,AL" },
+[0xa1] =	{ Awd,0,		"MOV%S	%i,%OAX" },
+[0xa2] =	{ Awd,0,		"MOVB	AL,%i" },
+[0xa3] =	{ Awd,0,		"MOV%S	%OAX,%i" },
+[0xa4] =	{ 0,0,		"MOVSB	(%ASI),(%ADI)" },
+[0xa5] =	{ 0,0,		"MOVS%S	(%ASI),(%ADI)" },
+[0xa6] =	{ 0,0,		"CMPSB	(%ASI),(%ADI)" },
+[0xa7] =	{ 0,0,		"CMPS%S	(%ASI),(%ADI)" },
+[0xa8] =	{ Ib,0,		"TESTB	%i,AL" },
+[0xa9] =	{ Iwd,0,		"TEST%S	%i,%OAX" },
+[0xaa] =	{ 0,0,		"STOSB	AL,(%ADI)" },
+[0xab] =	{ 0,0,		"STOS%S	%OAX,(%ADI)" },
+[0xac] =	{ 0,0,		"LODSB	(%ASI),AL" },
+[0xad] =	{ 0,0,		"LODS%S	(%ASI),%OAX" },
+[0xae] =	{ 0,0,		"SCASB	(%ADI),AL" },
+[0xaf] =	{ 0,0,		"SCAS%S	(%ADI),%OAX" },
+[0xb0] =	{ Ib,0,		"MOVB	%i,AL" },
+[0xb1] =	{ Ib,0,		"MOVB	%i,CL" },
+[0xb2] =	{ Ib,0,		"MOVB	%i,DL" },
+[0xb3] =	{ Ib,0,		"MOVB	%i,BL" },
+[0xb4] =	{ Ib,0,		"MOVB	%i,AH" },
+[0xb5] =	{ Ib,0,		"MOVB	%i,CH" },
+[0xb6] =	{ Ib,0,		"MOVB	%i,DH" },
+[0xb7] =	{ Ib,0,		"MOVB	%i,BH" },
+[0xb8] =	{ Iwdq,0,		"MOV%S	%i,%OAX" },
+[0xb9] =	{ Iwdq,0,		"MOV%S	%i,%OCX" },
+[0xba] =	{ Iwdq,0,		"MOV%S	%i,%ODX" },
+[0xbb] =	{ Iwdq,0,		"MOV%S	%i,%OBX" },
+[0xbc] =	{ Iwdq,0,		"MOV%S	%i,%OSP" },
+[0xbd] =	{ Iwdq,0,		"MOV%S	%i,%OBP" },
+[0xbe] =	{ Iwdq,0,		"MOV%S	%i,%OSI" },
+[0xbf] =	{ Iwdq,0,		"MOV%S	%i,%ODI" },
+[0xc0] =	{ RMOPB,0,	optabC0 },
+[0xc1] =	{ RMOP,0,		optabC1 },
+[0xc2] =	{ Iw,0,		"RET	%i" },
+[0xc3] =	{ RET,0,		"RET" },
+[0xc4] =	{ RM,0,		"LES	%e,%r" },
+[0xc5] =	{ RM,0,		"LDS	%e,%r" },
+[0xc6] =	{ RMB,Ib,		"MOVB	%i,%e" },
+[0xc7] =	{ RM,Iwd,		"MOV%S	%i,%e" },
+[0xc8] =	{ Iw2,Ib,		"ENTER	%i,%I" },		/* loony ENTER */
+[0xc9] =	{ RET,0,		"LEAVE" },		/* bizarre LEAVE */
+[0xca] =	{ Iw,0,		"RETF	%i" },
+[0xcb] =	{ RET,0,		"RETF" },
+[0xcc] =	{ 0,0,		"INT	3" },
+[0xcd] =	{ Ib,0,		"INTB	%i" },
+[0xce] =	{ 0,0,		"INTO" },
+[0xcf] =	{ 0,0,		"IRET" },
+[0xd0] =	{ RMOPB,0,	optabD0 },
+[0xd1] =	{ RMOP,0,		optabD1 },
+[0xd2] =	{ RMOPB,0,	optabD2 },
+[0xd3] =	{ RMOP,0,		optabD3 },
+[0xd4] =	{ OA,0,		"AAM" },
+[0xd5] =	{ OA,0,		"AAD" },
+[0xd7] =	{ 0,0,		"XLAT" },
+[0xd8] =	{ FRMOP,0,	optabD8 },
+[0xd9] =	{ FRMEX,0,	optabD9 },
+[0xda] =	{ FRMOP,0,	optabDA },
+[0xdb] =	{ FRMEX,0,	optabDB },
+[0xdc] =	{ FRMOP,0,	optabDC },
+[0xdd] =	{ FRMOP,0,	optabDD },
+[0xde] =	{ FRMOP,0,	optabDE },
+[0xdf] =	{ FRMOP,0,	optabDF },
+[0xe0] =	{ Jbs,0,		"LOOPNE	%p" },
+[0xe1] =	{ Jbs,0,		"LOOPE	%p" },
+[0xe2] =	{ Jbs,0,		"LOOP	%p" },
+[0xe3] =	{ Jbs,0,		"JCXZ	%p" },
+[0xe4] =	{ Ib,0,		"INB	%i,AL" },
+[0xe5] =	{ Ib,0,		"IN%S	%i,%OAX" },
+[0xe6] =	{ Ib,0,		"OUTB	AL,%i" },
+[0xe7] =	{ Ib,0,		"OUT%S	%OAX,%i" },
+[0xe8] =	{ Iwds,0,		"CALL	%p" },
+[0xe9] =	{ Iwds,0,		"JMP	%p" },
+[0xea] =	{ PTR,0,		"JMP	%d" },
+[0xeb] =	{ Jbs,0,		"JMP	%p" },
+[0xec] =	{ 0,0,		"INB	DX,AL" },
+[0xed] =	{ 0,0,		"IN%S	DX,%OAX" },
+[0xee] =	{ 0,0,		"OUTB	AL,DX" },
+[0xef] =	{ 0,0,		"OUT%S	%OAX,DX" },
+[0xf0] =	{ PRE,0,		"LOCK" },
+[0xf2] =	{ OPRE,0,		"REPNE" },
+[0xf3] =	{ OPRE,0,		"REP" },
+[0xf4] =	{ 0,0,		"HLT" },
+[0xf5] =	{ 0,0,		"CMC" },
+[0xf6] =	{ RMOPB,0,	optabF6 },
+[0xf7] =	{ RMOP,0,		optabF7 },
+[0xf8] =	{ 0,0,		"CLC" },
+[0xf9] =	{ 0,0,		"STC" },
+[0xfa] =	{ 0,0,		"CLI" },
+[0xfb] =	{ 0,0,		"STI" },
+[0xfc] =	{ 0,0,		"CLD" },
+[0xfd] =	{ 0,0,		"STD" },
+[0xfe] =	{ RMOPB,0,	optabFE },
+[0xff] =	{ RMOP,0,		optabFF },
+[0x100] =	{ RM,0,		"MOVLQSX	%e,%r" },
+[0x101] =	{ RM,0,		"MOVLQZX	%e,%r" },
 };
 
 /*
  *  get a byte of the instruction
  */
 static int
-igetc(Map * map, Instr *ip, uchar *c)
+igetc(Map *map, Instr *ip, uchar *c)
 {
 	if(ip->n+1 > sizeof(ip->mem)){
 		werrstr("instruction too long");
@@ -1312,7 +1458,7 @@ igetc(Map * map, Instr *ip, uchar *c)
 static int
 igets(Map *map, Instr *ip, ushort *sp)
 {
-	uchar	c;
+	uchar c;
 	ushort s;
 
 	if (igetc(map, ip, &c) < 0)
@@ -1329,10 +1475,10 @@ igets(Map *map, Instr *ip, ushort *sp)
  *  get 4 bytes of the instruction
  */
 static int
-igetl(Map *map, Instr *ip, ulong *lp)
+igetl(Map *map, Instr *ip, uint32 *lp)
 {
 	ushort s;
-	long	l;
+	int32	l;
 
 	if (igets(map, ip, &s) < 0)
 		return -1;
@@ -1344,8 +1490,28 @@ igetl(Map *map, Instr *ip, ulong *lp)
 	return 1;
 }
 
+/*
+ *  get 8 bytes of the instruction
+ *
+static int
+igetq(Map *map, Instr *ip, vlong *qp)
+{
+	uint32	l;
+	uvlong q;
+
+	if (igetl(map, ip, &l) < 0)
+		return -1;
+	q = l;
+	if (igetl(map, ip, &l) < 0)
+		return -1;
+	q |= ((uvlong)l<<32);
+	*qp = q;
+	return 1;
+}
+ */
+
 static int
-getdisp(Map *map, Instr *ip, int mod, int rm, int code)
+getdisp(Map *map, Instr *ip, int mod, int rm, int code, int pcrel)
 {
 	uchar c;
 	ushort s;
@@ -1363,6 +1529,8 @@ getdisp(Map *map, Instr *ip, int mod, int rm, int code)
 		if (ip->asize == 'E') {
 			if (igetl(map, ip, &ip->disp) < 0)
 				return -1;
+			if (mod == 0)
+				ip->rip = pcrel;
 		} else {
 			if (igets(map, ip, &s) < 0)
 				return -1;
@@ -1387,11 +1555,11 @@ modrm(Map *map, Instr *ip, uchar c)
 	ip->mod = mod;
 	ip->base = rm;
 	ip->reg = (c>>3)&7;
+	ip->rip = 0;
 	if (mod == 3)			/* register */
 		return 1;
 	if (ip->asize == 0) {		/* 16-bit mode */
-		switch(rm)
-		{
+		switch(rm) {
 		case 0:
 			ip->base = BX; ip->index = SI;
 			break;
@@ -1419,7 +1587,7 @@ modrm(Map *map, Instr *ip, uchar c)
 		default:
 			break;
 		}
-		return getdisp(map, ip, mod, rm, 6);
+		return getdisp(map, ip, mod, rm, 6, 0);
 	}
 	if (rm == 4) {	/* scummy sib byte */
 		if (igetc(map, ip, &c) < 0)
@@ -1429,35 +1597,53 @@ modrm(Map *map, Instr *ip, uchar c)
 		if (ip->index == 4)
 			ip->index = -1;
 		ip->base = c&0x07;
-		return getdisp(map, ip, mod, ip->base, 5);
+		return getdisp(map, ip, mod, ip->base, 5, 0);
 	}
-	return getdisp(map, ip, mod, rm, 5);
+	return getdisp(map, ip, mod, rm, 5, ip->amd64);
 }
 
 static Optable *
-mkinstr(Map *map, Instr *ip, ulong pc)
+mkinstr(Map *map, Instr *ip, uvlong pc)
 {
-	int i, n;
+	int i, n, norex;
 	uchar c;
 	ushort s;
 	Optable *op, *obase;
 	char buf[128];
 
 	memset(ip, 0, sizeof(*ip));
+	norex = 1;
 	ip->base = -1;
 	ip->index = -1;
-	if(0) /* asstype == AI8086) */
-		ip->osize = 'W';
-	else {
+//	if(asstype == AI8086)
+//		ip->osize = 'W';
+//	else {
 		ip->osize = 'L';
 		ip->asize = 'E';
-	}
+		ip->amd64 = (machcpu == &machamd64);
+		norex = 0;
+//	}
 	ip->addr = pc;
 	if (igetc(map, ip, &c) < 0)
 		return 0;
 	obase = optable;
 newop:
+	if(ip->amd64 && !norex){
+		if(c >= 0x40 && c <= 0x4f) {
+			ip->rex = c;
+			if(igetc(map, ip, &c) < 0)
+				return 0;
+		}
+		if(c == 0x63){
+			if(ip->rex&REXW)
+				op = &obase[0x100];	/* MOVLQSX */
+			else
+				op = &obase[0x101];	/* MOVLQZX */
+			goto hack;
+		}
+	}
 	op = &obase[c];
+hack:
 	if (op->proto == 0) {
 badop:
 		n = snprint(buf, sizeof(buf), "opcode: ??");
@@ -1468,12 +1654,12 @@ badop:
 		return 0;
 	}
 	for(i = 0; i < 2 && op->operand[i]; i++) {
-		switch(op->operand[i])
-		{
+		switch(op->operand[i]) {
 		case Ib:	/* 8-bit immediate - (no sign extension)*/
 			if (igetc(map, ip, &c) < 0)
 				return 0;
 			ip->imm = c&0xff;
+			ip->imm64 = ip->imm;
 			break;
 		case Jbs:	/* 8-bit jump immediate (sign extended) */
 			if (igetc(map, ip, &c) < 0)
@@ -1482,6 +1668,7 @@ badop:
 				ip->imm = c|0xffffff00;
 			else
 				ip->imm = c&0xff;
+			ip->imm64 = (int32)ip->imm;
 			ip->jumptype = Jbs;
 			break;
 		case Ibs:	/* 8-bit immediate (sign extended) */
@@ -1494,11 +1681,13 @@ badop:
 					ip->imm = c|0xff00;
 			else
 				ip->imm = c&0xff;
+			ip->imm64 = (int32)ip->imm;
 			break;
 		case Iw:	/* 16-bit immediate -> imm */
 			if (igets(map, ip, &s) < 0)
 				return 0;
 			ip->imm = s&0xffff;
+			ip->imm64 = ip->imm;
 			ip->jumptype = Iw;
 			break;
 		case Iw2:	/* 16-bit immediate -> in imm2*/
@@ -1506,10 +1695,31 @@ badop:
 				return 0;
 			ip->imm2 = s&0xffff;
 			break;
-		case Iwd:	/* Operand-sized immediate (no sign extension)*/
+		case Iwd:	/* Operand-sized immediate (no sign extension unless 64 bits)*/
 			if (ip->osize == 'L') {
 				if (igetl(map, ip, &ip->imm) < 0)
 					return 0;
+				ip->imm64 = ip->imm;
+				if(ip->rex&REXW && (ip->imm & (1<<31)) != 0)
+					ip->imm64 |= (vlong)~0 << 32;
+			} else {
+				if (igets(map, ip, &s)< 0)
+					return 0;
+				ip->imm = s&0xffff;
+				ip->imm64 = ip->imm;
+			}
+			break;
+		case Iwdq:	/* Operand-sized immediate, possibly big */
+			if (ip->osize == 'L') {
+				if (igetl(map, ip, &ip->imm) < 0)
+					return 0;
+				ip->imm64 = ip->imm;
+				if (ip->rex & REXW) {
+					uint32 l;
+					if (igetl(map, ip, &l) < 0)
+						return 0;
+					ip->imm64 |= (uvlong)l << 32;
+				}
 			} else {
 				if (igets(map, ip, &s)< 0)
 					return 0;
@@ -1520,6 +1730,7 @@ badop:
 			if (ip->asize == 'E') {
 				if (igetl(map, ip, &ip->imm) < 0)
 					return 0;
+				/* TO DO: REX */
 			} else {
 				if (igets(map, ip, &s)< 0)
 					return 0;
@@ -1546,11 +1757,11 @@ badop:
 			if (c != 0x0a)
 				goto badop;
 			break;
-		case R0:	/* base register must be R0 */
+		case Op_R0:	/* base register must be R0 */
 			if (ip->base != 0)
 				goto badop;
 			break;
-		case R1:	/* base register must be R1 */
+		case Op_R1:	/* base register must be R1 */
 			if (ip->base != 1)
 				goto badop;
 			break;
@@ -1581,8 +1792,10 @@ badop:
 				return 0;
 			if (modrm(map, ip, c) < 0)
 				return 0;
-			c = ip->reg;
 			obase = (Optable*)op->proto;
+			if(ip->amd64 && obase == optab0F01 && c == 0xF8)
+				return optab0F01F8;
+			c = ip->reg;
 			goto newop;
 		case FRMOP:	/* FP R/M field with op code (/digit) */
 			if (igetc(map, ip, &c) < 0)
@@ -1639,15 +1852,35 @@ badop:
 				return 0;
 			ip->jumptype = PTR;
 			break;
+		case AUXMM:	/* Multi-byte op code; prefix determines table selection */
+			if (igetc(map, ip, &c) < 0)
+				return 0;
+			obase = (Optable*)op->proto;
+			switch (ip->opre) {
+			case 0x66:	op = optab660F; break;
+			case 0xF2:	op = optabF20F; break;
+			case 0xF3:	op = optabF30F; break;
+			default:	op = nil; break;
+			}
+			if(op != nil && op[c].proto != nil)
+				obase = op;
+			norex = 1;	/* no more rex prefixes */
+			/* otherwise the optab entry captures it */
+			goto newop;
 		case AUX:	/* Multi-byte op code - Auxiliary table */
 			obase = (Optable*)op->proto;
 			if (igetc(map, ip, &c) < 0)
 				return 0;
 			goto newop;
+		case OPRE:	/* Instr Prefix or media op */
+			ip->opre = c;
+			/* fall through */
 		case PRE:	/* Instr Prefix */
 			ip->prefix = (char*)op->proto;
 			if (igetc(map, ip, &c) < 0)
 				return 0;
+			if (ip->opre && c == 0x0F)
+				ip->prefix = 0;
 			goto newop;
 		case SEG:	/* Segment Prefix */
 			ip->segment = (char*)op->proto;
@@ -1655,9 +1888,14 @@ badop:
 				return 0;
 			goto newop;
 		case OPOVER:	/* Operand size override */
+			ip->opre = c;
 			ip->osize = 'W';
 			if (igetc(map, ip, &c) < 0)
 				return 0;
+			if (c == 0x0F)
+				ip->osize = 'L';
+			else if (ip->amd64 && (c&0xF0) == 0x40)
+				ip->osize = 'Q';
 			goto newop;
 		case ADDOVER:	/* Address size override */
 			ip->asize = 0;
@@ -1676,6 +1914,8 @@ badop:
 	return op;
 }
 
+#pragma	varargck	argpos	bprint		2
+
 static void
 bprint(Instr *ip, char *fmt, ...)
 {
@@ -1697,17 +1937,29 @@ bprint(Instr *ip, char *fmt, ...)
 #define	ONAME(ip)	""
 
 static char *reg[] =  {
-	"AX",		/* 0 */
-	"CX",		/* 1 */
-	"DX",		/* 2 */
-	"BX",		/* 3 */
-	"SP",		/* 4 */
-	"BP",		/* 5 */
-	"SI",		/* 6 */
-	"DI",		/* 7 */
+[AX] =	"AX",
+[CX] =	"CX",
+[DX] =	"DX",
+[BX] =	"BX",
+[SP] =	"SP",
+[BP] =	"BP",
+[SI] =	"SI",
+[DI] =	"DI",
+
+	/* amd64 */
+[AMD64_R8] =	"R8",
+[AMD64_R9] =	"R9",
+[AMD64_R10] =	"R10",
+[AMD64_R11] =	"R11",
+[AMD64_R12] =	"R12",
+[AMD64_R13] =	"R13",
+[AMD64_R14] =	"R14",
+[AMD64_R15] =	"R15",
 };
 
 static char *breg[] = { "AL", "CL", "DL", "BL", "AH", "CH", "DH", "BH" };
+static char *breg64[] = { "AL", "CL", "DL", "BL", "SPB", "BPB", "SIB", "DIB",
+	"R8B", "R9B", "R10B", "R11B", "R12B", "R13B", "R14B", "R15B" };
 static char *sreg[] = { "ES", "CS", "SS", "DS", "FS", "GS" };
 
 static void
@@ -1716,33 +1968,48 @@ plocal(Instr *ip)
 	Symbol s;
 	char *name;
 	Loc l, li;
-
+	
 	l.type = LOFFSET;
 	l.offset = ip->disp;
 	if(ip->base == SP)
 		l.reg = "SP";
 	else
 		l.reg = "BP";
-
+	
 	li.type = LADDR;
 	li.addr = ip->addr;
 	if(findsym(li, CTEXT, &s) < 0)
 		goto raw;
 
 	name = nil;
-	if(ip->base==SP && lookuplsym(&s, FRAMENAME, &s) >= 0){
-		/* translate stack offset to offset from plan 9 frame pointer */
+	if(ip->base==SP && lookuplsym(&s, FRAMENAME, &s) >= 0) {
+		/* translate stack offset to offset from plan 9 frame pointer*/
 		/* XXX not sure how to do this */
 	}
 
 	if(name==nil && findlsym(&s, l, &s) >= 0)
 		name = s.name;
-
+	
 	if(name)
 		bprint(ip, "%s+", name);
 
 raw:
-	bprint(ip, "%lx(%s)", l.offset, l.reg);
+	bprint(ip, "%#lx(%s)", l.offset, l.reg);
+/*
+	if (s.value > ip->disp) {
+		ret = getauto(&s, s.value-ip->disp-mach->szaddr, CAUTO, &s);
+		reg = "(SP)";
+	} else {
+		offset -= s.value;
+		ret = getauto(&s, offset, CPARAM, &s);
+		reg = "(FP)";
+	}
+	if (ret)
+		bprint(ip, "%s+", s.name);
+	else
+		offset = ip->disp;
+	bprint(ip, "%ux%s", offset, reg);
+*/
 }
 
 static int
@@ -1765,10 +2032,10 @@ isjmp(Instr *ip)
  * are changed on sources.
  */
 static int
-issymref(Instr *ip, Symbol *s, long w, long val)
+issymref(Instr *ip, Symbol *s, int32 w, int32 val)
 {
 	Symbol next, tmp;
-	long isstring, size;
+	int32 isstring, size;
 
 	if (isjmp(ip))
 		return 1;
@@ -1777,8 +2044,8 @@ issymref(Instr *ip, Symbol *s, long w, long val)
 	if (s->class==CDATA) {
 		/* use first bss symbol (or "end") rather than edata */
 		if (s->name[0]=='e' && strcmp(s->name, "edata") == 0){
-			if((indexsym(s->index+1, &tmp) && loccmp(&tmp.loc, &s->loc)==0)
-			|| (indexsym(s->index-1, &tmp) && loccmp(&tmp.loc, &s->loc)==0))
+			if((indexsym(s->index+1, &tmp) && loccmp(&tmp.loc, &s->loc) == 0)
+			|| (indexsym(s->index-1, &tmp) && loccmp(&tmp.loc, &s->loc) == 0))
 				*s = tmp;
 		}
 		if (w == 0)
@@ -1805,7 +2072,7 @@ issymref(Instr *ip, Symbol *s, long w, long val)
 }
 
 static void
-immediate(Instr *ip, long val)
+immediate(Instr *ip, vlong val)
 {
 	Symbol s;
 	long w;
@@ -1813,28 +2080,33 @@ immediate(Instr *ip, long val)
 
 	l.type = LADDR;
 	l.addr = val;
-	if (findsym(l, CANY, &s) >= 0) {
+	if (findsym(l, CANY, &s) >= 0) {		/* TO DO */
 		w = val - s.loc.addr;
 		if (w < 0)
 			w = -w;
 		if (issymref(ip, &s, w, val)) {
 			if (w)
-				bprint(ip, "%s+%lux(SB)", s.name, w);
+				bprint(ip, "%s+%#lux(SB)", s.name, w);
 			else
 				bprint(ip, "%s(SB)", s.name);
 			return;
 		}
-		if (s.class==CDATA && indexsym(s.index+1, &s) >= 0) {
-			w = s.loc.addr - val;
+/*
+		if (s.class==CDATA && globalsym(&s, s.index+1)) {
+			w = s.value - val;
 			if (w < 0)
 				w = -w;
 			if (w < 4096) {
-				bprint(ip, "%s-%lux(SB)", s.name, w);
+				bprint(ip, "%s-%#lux(SB)", s.name, w);
 				return;
 			}
 		}
+*/
 	}
-	bprint(ip, "%lux", val);
+	if((ip->rex & REXW) == 0)
+		bprint(ip, "%lux", (long)val);
+	else
+		bprint(ip, "%llux", val);
 }
 
 static void
@@ -1842,37 +2114,50 @@ pea(Instr *ip)
 {
 	if (ip->mod == 3) {
 		if (ip->osize == 'B')
-			bprint(ip, breg[(uchar)ip->base]);
+			bprint(ip, (ip->rex & REXB? breg64: breg)[(uchar)ip->base]);
+		else if(ip->rex & REXB)
+			bprint(ip, "%s%s", ANAME(ip), reg[ip->base+8]);
 		else
 			bprint(ip, "%s%s", ANAME(ip), reg[(uchar)ip->base]);
 		return;
 	}
 	if (ip->segment)
 		bprint(ip, ip->segment);
-	if (ip->asize == 'E' && (ip->base == SP || ip->base == BP))
+	if (ip->asize == 'E' && ip->base == SP)
 		plocal(ip);
 	else {
 		if (ip->base < 0)
 			immediate(ip, ip->disp);
 		else {
-			bprint(ip, "%lux", ip->disp);
-			bprint(ip,"(%s%s)", ANAME(ip), reg[(uchar)ip->base]);
+			bprint(ip, "%ux", ip->disp);
+			if(ip->rip)
+				bprint(ip, "(RIP)");
+			bprint(ip,"(%s%s)", ANAME(ip), reg[ip->rex&REXB? ip->base+8: ip->base]);
 		}
 	}
 	if (ip->index >= 0)
-		bprint(ip,"(%s%s*%d)", ANAME(ip), reg[(uchar)ip->index], 1<<ip->ss);
+		bprint(ip,"(%s%s*%d)", ANAME(ip), reg[ip->rex&REXX? ip->index+8: ip->index], 1<<ip->ss);
 }
 
 static void
 prinstr(Instr *ip, char *fmt)
 {
+	int sharp;
+	vlong v;
+
 	if (ip->prefix)
 		bprint(ip, "%s ", ip->prefix);
 	for (; *fmt && ip->curr < ip->end; fmt++) {
-		if (*fmt != '%')
+		if (*fmt != '%'){
 			*ip->curr++ = *fmt;
-		else switch(*++fmt)
-		{
+			continue;
+		}
+		sharp = 0;
+		if(*++fmt == '#') {
+			sharp = 1;
+			++fmt;
+		}
+		switch(*fmt){
 		case '%':
 			*ip->curr++ = '%';
 			break;
@@ -1896,14 +2181,31 @@ prinstr(Instr *ip, char *fmt)
 			bprint(ip,"%s", ONAME(ip));
 			break;
 		case 'i':
-			bprint(ip, "$");
-			immediate(ip,ip->imm);
+			if(!sharp)
+				bprint(ip, "$");
+			v = ip->imm;
+			if(ip->rex & REXW)
+				v = ip->imm64;
+			immediate(ip, v);
 			break;
 		case 'R':
-			bprint(ip, "%s%s", ONAME(ip), reg[ip->reg]);
+			bprint(ip, "%s%s", ONAME(ip), reg[ip->rex&REXR? ip->reg+8: ip->reg]);
 			break;
 		case 'S':
-			bprint(ip, "%c", ip->osize);
+			if(ip->osize == 'Q' || ip->osize == 'L' && ip->rex & REXW)
+				bprint(ip, "Q");
+			else
+				bprint(ip, "%c", ip->osize);
+			break;
+		case 's':
+			if(ip->opre == 0 || ip->opre == 0x66)
+				bprint(ip, "P");
+			else
+				bprint(ip, "S");
+			if(ip->opre == 0xf2 || ip->opre == 0x66)
+				bprint(ip, "D");
+			else
+				bprint(ip, "S");
 			break;
 		case 'T':
 			if (ip->reg == 6 || ip->reg == 7)
@@ -1911,14 +2213,30 @@ prinstr(Instr *ip, char *fmt)
 			else
 				bprint(ip, "???");
 			break;
-		case 'X':
-			if (ip->osize == 'L')
+		case 'W':
+			if (ip->osize == 'Q' || ip->osize == 'L' && ip->rex & REXW)
+				bprint(ip, "CDQE");
+			else if (ip->osize == 'L')
 				bprint(ip,"CWDE");
 			else
 				bprint(ip, "CBW");
 			break;
 		case 'd':
-			bprint(ip,"%lux:%lux",ip->seg,ip->disp);
+			bprint(ip,"%ux:%ux", ip->seg, ip->disp);
+			break;
+		case 'm':
+			if (ip->mod == 3 && ip->osize != 'B') {
+				if(fmt[1] != '*'){
+					if(ip->opre != 0) {
+						bprint(ip, "X%d", ip->rex&REXB? ip->base+8: ip->base);
+						break;
+					}
+				} else
+					fmt++;
+				bprint(ip, "M%d", ip->base);
+				break;
+			}
+			pea(ip);
 			break;
 		case 'e':
 			pea(ip);
@@ -1933,20 +2251,42 @@ prinstr(Instr *ip, char *fmt)
 				bprint(ip,"???");
 			break;
 		case 'p':
-			immediate(ip, ip->imm+ip->addr+ip->n);
+			/*
+			 * signed immediate in the uint32 ip->imm.
+			 */
+			v = (int32)ip->imm;
+			immediate(ip, v+ip->addr+ip->n);
 			break;
 		case 'r':
 			if (ip->osize == 'B')
-				bprint(ip,"%s",breg[ip->reg]);
+				bprint(ip,"%s", (ip->rex? breg64: breg)[ip->rex&REXR? ip->reg+8: ip->reg]);
 			else
-				bprint(ip, reg[ip->reg]);
+				bprint(ip, reg[ip->rex&REXR? ip->reg+8: ip->reg]);
 			break;
-		case 'x':
-			if (ip->osize == 'L')
+		case 'w':
+			if (ip->osize == 'Q' || ip->rex & REXW)
+				bprint(ip, "CQO");
+			else if (ip->osize == 'L')
 				bprint(ip,"CDQ");
 			else
 				bprint(ip, "CWD");
 			break;
+		case 'M':
+			if(ip->opre != 0)
+				bprint(ip, "X%d", ip->rex&REXR? ip->reg+8: ip->reg);
+			else
+				bprint(ip, "M%d", ip->reg);
+			break;
+		case 'x':
+			if (ip->mod == 3 && ip->osize != 'B') {
+				bprint(ip, "X%d", ip->rex&REXB? ip->base+8: ip->base);
+				break;
+			}
+			pea(ip);
+			break;
+		case 'X':
+			bprint(ip, "X%d", ip->rex&REXR? ip->reg+8: ip->reg);
+			break;
 		default:
 			bprint(ip, "%%%c", *fmt);
 			break;
@@ -1955,10 +2295,10 @@ prinstr(Instr *ip, char *fmt)
 	*ip->curr = 0;		/* there's always room for 1 byte */
 }
 
-static int
-i386das(Map *map, ulong pc, char modifier, char *buf, int n)
+int
+i386das(Map *map, uvlong pc, char modifier, char *buf, int n)
 {
-	Instr	instr;
+	Instr instr;
 	Optable *op;
 
 	USED(modifier);
@@ -1973,10 +2313,10 @@ i386das(Map *map, ulong pc, char modifier, char *buf, int n)
 	return instr.n;
 }
 
-static int
-i386hexinst(Map *map, ulong pc, char *buf, int n)
+int
+i386hexinst(Map *map, u64int pc, char *buf, int n)
 {
-	Instr	instr;
+	Instr instr;
 	int i;
 
 	if (mkinstr(map, &instr, pc) == 0) {
@@ -1992,8 +2332,8 @@ i386hexinst(Map *map, ulong pc, char *buf, int n)
 	return instr.n;
 }
 
-static int
-i386instlen(Map *map, ulong pc)
+int
+i386instlen(Map *map, u64int pc)
 {
 	Instr i;
 
@@ -2002,14 +2342,14 @@ i386instlen(Map *map, ulong pc)
 	return -1;
 }
 
-static int
-i386foll(Map *map, Regs *regs, ulong pc, ulong *foll)
+int
+i386foll(Map *map, Regs *regs, u64int pc, u64int *foll)
 {
 	Instr i;
 	Optable *op;
 	ushort s;
-	ulong addr;
-	u32int l;
+	u64int l, addr;
+	vlong v;
 	int n;
 
 	op = mkinstr(map, &i, pc);
@@ -2022,15 +2362,16 @@ i386foll(Map *map, Regs *regs, ulong pc, ulong *foll)
 	case RET:		/* RETURN or LEAVE */
 	case Iw:		/* RETURN */
 		if (strcmp(op->proto, "LEAVE") == 0) {
-			if (lget4(map, regs, locindir("BP", 0), &l) < 0)
+			if (lgeta(map, regs, locindir("BP", 0), &l) < 0)
 				return -1;
-		} else if (lget4(map, regs, locindir(mach->sp, 0), &l) < 0)
+		} else if (lgeta(map, regs, locindir(mach->sp, 0), &l) < 0)
 			return -1;
 		foll[0] = l;
 		return 1;
 	case Iwds:		/* pc relative JUMP or CALL*/
 	case Jbs:		/* pc relative JUMP or CALL */
-		foll[0] = pc+i.imm+i.n;
+		v = (int32)i.imm;
+		foll[0] = pc+v+i.n;
 		n = 1;
 		break;
 	case PTR:		/* seg:displacement JUMP or CALL */
@@ -2039,29 +2380,29 @@ i386foll(Map *map, Regs *regs, ulong pc, ulong *foll)
 	case JUMP:		/* JUMP or CALL EA */
 
 		if(i.mod == 3) {
-			if (rget(regs, reg[(uchar)i.base], &foll[0]) < 0)
+			if (rget(regs, reg[i.rex&REXB? i.base+8: i.base], &foll[0]) < 0)
 				return -1;
 			return 1;
 		}
 			/* calculate the effective address */
 		addr = i.disp;
 		if (i.base >= 0) {
-			if (lget4(map, regs, locindir(reg[(uchar)i.base], 0), &l) < 0)
+			if (lgeta(map, regs, locindir(reg[i.rex&REXB? i.base+8: i.base], 0), &l) < 0)
 				return -1;
 			addr += l;
 		}
 		if (i.index >= 0) {
-			if (lget4(map, regs, locindir(reg[(uchar)i.index], 0), &l) < 0)
+			if (lgeta(map, regs, locindir(reg[i.rex&REXX? i.index+8: i.index], 0), &l) < 0)
 				return -1;
 			addr += l*(1<<i.ss);
 		}
 			/* now retrieve a seg:disp value at that address */
-		if (get2(map, addr, &s) < 0)		/* seg */
+		if (get2(map, addr, &s) < 0)			/* seg */
 			return -1;
 		foll[0] = s<<4;
 		addr += 2;
 		if (i.asize == 'L') {
-			if (get4(map, addr, &l) < 0)	/* disp32 */
+			if (geta(map, addr, &l) < 0)		/* disp32 */
 				return -1;
 			foll[0] += l;
 		} else {					/* disp16 */
@@ -2072,7 +2413,7 @@ i386foll(Map *map, Regs *regs, ulong pc, ulong *foll)
 		return 1;
 	default:
 		break;
-	}		
+	}
 	if (strncmp(op->proto,"JMP", 3) == 0 || strncmp(op->proto,"CALL", 4) == 0)
 		return 1;
 	foll[n++] = pc+i.n;
diff --git a/src/libmach/machamd64.c b/src/libmach/machamd64.c
new file mode 100644
index 00000000..f220ebcf
--- /dev/null
+++ b/src/libmach/machamd64.c
@@ -0,0 +1,197 @@
+// Inferno libmach/6.c
+// http://code.google.com/p/inferno-os/source/browse/utils/libmach/6.c
+//
+// 	Copyright © 1994-1999 Lucent Technologies Inc.
+// 	Power PC support Copyright © 1995-2004 C H Forsyth (forsyth@terzarima.net).
+// 	Portions Copyright © 1997-1999 Vita Nuova Limited.
+// 	Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com).
+// 	Revisions Copyright © 2000-2004 Lucent Technologies Inc. and others.
+//	Portions Copyright © 2009 The Go Authors.  All rights reserved.
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in
+// all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+// THE SOFTWARE.
+
+/*
+ * amd64 definition
+ */
+#include <u.h>
+#include <libc.h>
+#include <bio.h>
+#include <mach.h>
+#include "uregamd64.h"
+
+	char	*i386excep(Map*, Regs*);
+	int	i386foll(Map*, Regs*, u64int, u64int*);
+	int	i386hexinst(Map*, u64int, char*, int);
+	int	i386das(Map*, u64int, char, char*, int);
+	int	i386instlen(Map*, u64int);
+	int	i386unwind(Map*, Regs*, u64int*, Symbol*);
+
+#define	REGOFF(x)	offsetof(struct Ureg, x)
+
+#define	REGSIZE		sizeof(struct Ureg)
+#define FP_CTLS(x)	(REGSIZE+2*(x))
+#define FP_CTL(x)	(REGSIZE+4*(x))
+#define FP_REG(x)	(FP_CTL(8)+16*(x))
+#define XM_REG(x)	(FP_CTL(8)+8*16+16*(x))
+
+#define	FPREGSIZE	512	/* TO DO? currently only 0x1A0 used */
+
+static Regdesc amd64reglist[] = {
+	{"AX",		REGOFF(ax),	RINT, 'Y'},
+	{"BX",		REGOFF(bx),	RINT, 'Y'},
+	{"CX",		REGOFF(cx),	RINT, 'Y'},
+	{"DX",		REGOFF(dx),	RINT, 'Y'},
+	{"SI",		REGOFF(si),	RINT, 'Y'},
+	{"DI",		REGOFF(di),	RINT, 'Y'},
+	{"BP",		REGOFF(bp),	RINT, 'Y'},
+	{"R8",		REGOFF(r8),	RINT, 'Y'},
+	{"R9",		REGOFF(r9),	RINT, 'Y'},
+	{"R10",		REGOFF(r10),	RINT, 'Y'},
+	{"R11",		REGOFF(r11),	RINT, 'Y'},
+	{"R12",		REGOFF(r12),	RINT, 'Y'},
+	{"R13",		REGOFF(r13),	RINT, 'Y'},
+	{"R14",		REGOFF(r14),	RINT, 'Y'},
+	{"R15",		REGOFF(r15),	RINT, 'Y'},
+	{"DS",		REGOFF(ds),	RINT, 'x'},
+	{"ES",		REGOFF(es),	RINT, 'x'},
+	{"FS",		REGOFF(fs),	RINT, 'x'},
+	{"GS",		REGOFF(gs),	RINT, 'x'},
+	{"TYPE",	REGOFF(type), 	RINT, 'Y'},
+	{"TRAP",	REGOFF(type), 	RINT, 'Y'},	/* alias for acid */
+	{"ERROR",	REGOFF(error),	RINT, 'Y'},
+	{"IP",		REGOFF(ip),	RINT, 'Y'},
+	{"PC",		REGOFF(ip),	RINT, 'Y'},	/* alias for acid */
+	{"CS",		REGOFF(cs),	RINT, 'Y'},
+	{"FLAGS",	REGOFF(flags),	RINT, 'Y'},
+	{"SP",		REGOFF(sp),	RINT, 'Y'},
+	{"SS",		REGOFF(ss),	RINT, 'Y'},
+
+	{"FCW",		FP_CTLS(0),	RFLT, 'x'},
+	{"FSW",		FP_CTLS(1),	RFLT, 'x'},
+	{"FTW",		FP_CTLS(2),	RFLT, 'b'},
+	{"FOP",		FP_CTLS(3),	RFLT, 'x'},
+	{"RIP",		FP_CTL(2),	RFLT, 'Y'},
+	{"RDP",		FP_CTL(4),	RFLT, 'Y'},
+	{"MXCSR",	FP_CTL(6),	RFLT, 'X'},
+	{"MXCSRMASK",	FP_CTL(7),	RFLT, 'X'},
+	{"M0",		FP_REG(0),	RFLT, 'F'},	/* assumes double */
+	{"M1",		FP_REG(1),	RFLT, 'F'},
+	{"M2",		FP_REG(2),	RFLT, 'F'},
+	{"M3",		FP_REG(3),	RFLT, 'F'},
+	{"M4",		FP_REG(4),	RFLT, 'F'},
+	{"M5",		FP_REG(5),	RFLT, 'F'},
+	{"M6",		FP_REG(6),	RFLT, 'F'},
+	{"M7",		FP_REG(7),	RFLT, 'F'},
+	{"X0",		XM_REG(0),	RFLT, 'F'},	/* assumes double */
+	{"X1",		XM_REG(1),	RFLT, 'F'},
+	{"X2",		XM_REG(2),	RFLT, 'F'},
+	{"X3",		XM_REG(3),	RFLT, 'F'},
+	{"X4",		XM_REG(4),	RFLT, 'F'},
+	{"X5",		XM_REG(5),	RFLT, 'F'},
+	{"X6",		XM_REG(6),	RFLT, 'F'},
+	{"X7",		XM_REG(7),	RFLT, 'F'},
+	{"X8",		XM_REG(8),	RFLT, 'F'},
+	{"X9",		XM_REG(9),	RFLT, 'F'},
+	{"X10",		XM_REG(10),	RFLT, 'F'},
+	{"X11",		XM_REG(11),	RFLT, 'F'},
+	{"X12",		XM_REG(12),	RFLT, 'F'},
+	{"X13",		XM_REG(13),	RFLT, 'F'},
+	{"X14",		XM_REG(14),	RFLT, 'F'},
+	{"X15",		XM_REG(15),	RFLT, 'F'},
+	{"X16",		XM_REG(16),	RFLT, 'F'},
+/*
+	{"F0",		FP_REG(7),	RFLT, '3'},
+	{"F1",		FP_REG(6),	RFLT, '3'},
+	{"F2",		FP_REG(5),	RFLT, '3'},
+	{"F3",		FP_REG(4),	RFLT, '3'},
+	{"F4",		FP_REG(3),	RFLT, '3'},
+	{"F5",		FP_REG(2),	RFLT, '3'},
+	{"F6",		FP_REG(1),	RFLT, '3'},
+	{"F7",		FP_REG(0),	RFLT, '3'},
+*/
+	{  0 }
+};
+
+static char *amd64windregs[] = {
+	"PC",
+	"SP",
+	"BP",
+	"AX",
+	"CX",
+	"DX",
+	"BX",
+	"SI",
+	"DI",
+	"R8",
+	"R9",
+	"R10",
+	"R11",
+	"R12",
+	"R13",
+	"R14",
+	"R15",
+	0,
+};
+
+
+Mach machamd64=
+{
+	"amd64",
+	MAMD64,			/* machine type */
+	amd64reglist,		/* register list */
+	REGSIZE,		/* size of registers in bytes */
+	FPREGSIZE,		/* size of fp registers in bytes */
+	"PC",			/* name of PC */
+	"SP",			/* name of SP */
+	"BP",			/* name of FP */
+	0,			/* link register */
+	"setSB",		/* static base register name (bogus anyways) */
+	0,			/* static base register value */
+	0x1000,			/* page size */
+	0xFFFFFFFF80110000ULL,	/* kernel base */
+	0xFFFF800000000000ULL,	/* kernel text mask */
+	1,			/* quantization of pc */
+	8,			/* szaddr */
+	4,			/* szreg */
+	4,			/* szfloat */
+	8,			/* szdouble */
+	
+	amd64windregs,	/* locations unwound in stack trace */
+	17,
+	
+	{0xCC, 0, 0, 0},	/* break point: INT 3 */
+	1,			/* break point size */
+
+	i386foll,		/* following addresses */
+	i386excep,		/* print exception */
+	i386unwind,		/* stack unwind */
+
+	leswap2,			/* convert short to local byte order */
+	leswap4,			/* convert long to local byte order */
+	leswap8,			/* convert vlong to local byte order */
+	leieeeftoa32,		/* single precision float pointer */
+	leieeeftoa64,		/* double precision float pointer */
+	leieeeftoa80,		/* long double precision floating point */
+
+	i386das,		/* dissembler */
+	i386das,		/* plan9-format disassembler */
+	0,			/* commercial disassembler */
+	i386hexinst,		/* print instruction */
+	i386instlen,		/* instruction size calculation */
+};
diff --git a/src/libmach/machpower.c b/src/libmach/machpower.c
index d33651c0..4c9b574c 100644
--- a/src/libmach/machpower.c
+++ b/src/libmach/machpower.c
@@ -14,10 +14,10 @@
  */
 
 static	char	*powerexcep(Map*, Regs*);
-static	int	powerfoll(Map*, Regs*, ulong, ulong*);
-static	int	powerdas(Map*, ulong, char, char*, int);
-static	int	powerinstlen(Map*, ulong);
-static	int	powerhexinst(Map*, ulong, char*, int);
+static	int	powerfoll(Map*, Regs*, u64int, u64int*);
+static	int	powerdas(Map*, u64int, char, char*, int);
+static	int	powerinstlen(Map*, u64int);
+static	int	powerhexinst(Map*, u64int, char*, int);
 
 static char *excname[] =
 {
@@ -59,7 +59,7 @@ static char *excname[] =
 static char*
 powerexcep(Map *map, Regs *regs)
 {
-	ulong c;
+	u64int c;
 	static char buf[32];
 
 	if(rget(regs, "CAUSE", &c) < 0)
@@ -130,7 +130,7 @@ typedef struct {
 	long	immediate;
 	long w0;
 	long w1;
-	ulong	addr;		/* pc of instruction */
+	u64int	addr;		/* pc of instruction */
 	short	target;
 	char	*curr;		/* current fill level in output buffer */
 	char	*end;		/* end of buffer */
@@ -1155,14 +1155,14 @@ printins(Map *map, ulong pc, char *buf, int n)
 }
 
 static int
-powerdas(Map *map, ulong pc, char modifier, char *buf, int n)
+powerdas(Map *map, u64int pc, char modifier, char *buf, int n)
 {
 	USED(modifier);
 	return printins(map, pc, buf, n);
 }
 
 static int
-powerhexinst(Map *map, ulong pc, char *buf, int n)
+powerhexinst(Map *map, u64int pc, char *buf, int n)
 {
 	Instr instr;
 
@@ -1183,7 +1183,7 @@ powerhexinst(Map *map, ulong pc, char *buf, int n)
 }
 
 static int
-powerinstlen(Map *map, ulong pc)
+powerinstlen(Map *map, u64int pc)
 {
 	Instr i;
 
@@ -1194,7 +1194,7 @@ powerinstlen(Map *map, ulong pc)
 }
 
 static int
-powerfoll(Map *map, Regs *regs, ulong pc, ulong *foll)
+powerfoll(Map *map, Regs *regs, u64int pc, u64int *foll)
 {
 	char *reg;
 	Instr i;
@@ -1337,7 +1337,7 @@ static char *powerwindregs[] =
 };
 
 static int
-powerunwind(Map *map, Regs *regs, ulong *next, Symbol *sym)
+powerunwind(Map *map, Regs *regs, u64int *next, Symbol *sym)
 {
 	/*
 	 * This is tremendously hard.  The best we're going to
diff --git a/src/libmach/manglegcc2.c b/src/libmach/manglegcc2.c
index a9242cb5..9dae425b 100644
--- a/src/libmach/manglegcc2.c
+++ b/src/libmach/manglegcc2.c
@@ -619,6 +619,9 @@ gccname(char **ps, char **pp)
 		break;
 	}
 
+	USED(p1);
+	USED(p0);
+
 out:	
 	*ps = s;
 	*pp = p;
diff --git a/src/libmach/map.c b/src/libmach/map.c
index b20bd873..392efbed 100644
--- a/src/libmach/map.c
+++ b/src/libmach/map.c
@@ -6,10 +6,10 @@
 #include <bio.h>
 #include <mach.h>
 
-static int fdrw(Map*, Seg*, ulong, void*, uint, int);
-static int zerorw(Map*, Seg*, ulong, void*, uint, int);
-static int mrw(Map*, ulong, void*, uint, int);
-static int datarw(Map*, Seg*, ulong, void*, uint, int);
+static int fdrw(Map*, Seg*, u64int, void*, uint, int);
+static int zerorw(Map*, Seg*, u64int, void*, uint, int);
+static int mrw(Map*, u64int, void*, uint, int);
+static int datarw(Map*, Seg*, u64int, void*, uint, int);
 
 Map*
 allocmap(void)
@@ -71,7 +71,7 @@ findseg(Map *map, char *name, char *file)
 }
 
 int
-addrtoseg(Map *map, ulong addr, Seg *sp)
+addrtoseg(Map *map, u64int addr, Seg *sp)
 {
 	int i;
 	Seg *s;
@@ -93,7 +93,7 @@ addrtoseg(Map *map, ulong addr, Seg *sp)
 }
 
 int
-addrtosegafter(Map *map, ulong addr, Seg *sp)
+addrtosegafter(Map *map, u64int addr, Seg *sp)
 {
 	int i;
 	Seg *s, *best;
@@ -142,13 +142,13 @@ removeseg(Map *map, int i)
 }
 
 int
-get1(Map *map, ulong addr, uchar *a, uint n)
+get1(Map *map, u64int addr, uchar *a, uint n)
 {
 	return mrw(map, addr, a, n, 1);
 }
 
 int
-get2(Map *map, ulong addr, u16int *u)
+get2(Map *map, u64int addr, u16int *u)
 {
 	u16int v;
 
@@ -159,7 +159,7 @@ get2(Map *map, ulong addr, u16int *u)
 }
 
 int
-get4(Map *map, ulong addr, u32int *u)
+get4(Map *map, u64int addr, u32int *u)
 {
 	u32int v;
 
@@ -170,7 +170,7 @@ get4(Map *map, ulong addr, u32int *u)
 }
 
 int
-get8(Map *map, ulong addr, u64int *u)
+get8(Map *map, u64int addr, u64int *u)
 {
 	u64int v;
 
@@ -181,34 +181,47 @@ get8(Map *map, ulong addr, u64int *u)
 }
 
 int
-put1(Map *map, ulong addr, uchar *a, uint n)
+geta(Map *map, u64int addr, u64int *u)
+{
+	u32int v;
+
+	if(machcpu == &machamd64)
+		return get8(map, addr, u);
+	if(get4(map, addr, &v) < 0)
+		return -1;
+	*u = v;
+	return 4;
+}
+
+int
+put1(Map *map, u64int addr, uchar *a, uint n)
 {
 	return mrw(map, addr, a, n, 0);
 }
 
 int
-put2(Map *map, ulong addr, u16int u)
+put2(Map *map, u64int addr, u16int u)
 {
 	u = mach->swap2(u);
 	return mrw(map, addr, &u, 2, 0);
 }
 
 int
-put4(Map *map, ulong addr, u32int u)
+put4(Map *map, u64int addr, u32int u)
 {
 	u = mach->swap4(u);
 	return mrw(map, addr, &u, 4, 0);
 }
 
 int
-put8(Map *map, ulong addr, u64int u)
+put8(Map *map, u64int addr, u64int u)
 {
 	u = mach->swap8(u);
 	return mrw(map, addr, &u, 8, 0);
 }
 
 static Seg*
-reloc(Map *map, ulong addr, uint n, ulong *off, uint *nn)
+reloc(Map *map, u64int addr, uint n, u64int *off, uint *nn)
 {
 	int i;
 	ulong o;
@@ -236,12 +249,12 @@ reloc(Map *map, ulong addr, uint n, ulong *off, uint *nn)
 }
 
 static int
-mrw(Map *map, ulong addr, void *a, uint n, int r)
+mrw(Map *map, u64int addr, void *a, uint n, int r)
 {
 	uint nn;
 	uint tot;
 	Seg *s;
-	ulong off;
+	u64int off;
 
 	for(tot=0; tot<n; tot+=nn){
 		s = reloc(map, addr+tot, n-tot, &off, &nn);
@@ -254,7 +267,7 @@ mrw(Map *map, ulong addr, void *a, uint n, int r)
 }
 
 static int
-fdrw(Map *map, Seg *seg, ulong addr, void *a, uint n, int r)
+fdrw(Map *map, Seg *seg, u64int addr, void *a, uint n, int r)
 {
 	int nn;
 	uint tot;
@@ -279,7 +292,7 @@ fdrw(Map *map, Seg *seg, ulong addr, void *a, uint n, int r)
 }
 
 static int
-zerorw(Map *map, Seg *seg, ulong addr, void *a, uint n, int r)
+zerorw(Map *map, Seg *seg, u64int addr, void *a, uint n, int r)
 {
 	USED(map);
 	USED(seg);
@@ -294,7 +307,7 @@ zerorw(Map *map, Seg *seg, ulong addr, void *a, uint n, int r)
 }
 
 static int
-datarw(Map *map, Seg *seg, ulong addr, void *a, uint n, int r)
+datarw(Map *map, Seg *seg, u64int addr, void *a, uint n, int r)
 {
 	USED(map);
 
diff --git a/src/libmach/mkfile b/src/libmach/mkfile
index 3d3a6780..7659b708 100644
--- a/src/libmach/mkfile
+++ b/src/libmach/mkfile
@@ -20,6 +20,7 @@ OFILES=\
 	elf.$O\
 	elfdl386.$O\
 	elfcorefreebsd386.$O\
+	elfcorefreebsdamd64.$O\
 	elfcorelinux386.$O\
 	frame.$O\
 	fpformat.$O\
@@ -28,6 +29,7 @@ OFILES=\
 	loc.$O\
 	localaddr.$O\
 	mach386.$O\
+	machamd64.$O\
 	macho.$O\
 	machocorepower.$O\
 	machpower.$O\
diff --git a/src/libmach/regs.c b/src/libmach/regs.c
index 78972eeb..4df03cbd 100644
--- a/src/libmach/regs.c
+++ b/src/libmach/regs.c
@@ -14,7 +14,7 @@ regdesc(char *name)
 }
 
 int
-rput(Regs *regs, char *name, ulong u)
+rput(Regs *regs, char *name, u64int u)
 {
 	if(regs == nil){
 		werrstr("registers not mapped");
@@ -24,7 +24,7 @@ rput(Regs *regs, char *name, ulong u)
 }
 
 int
-rget(Regs *regs, char *name, ulong *u)
+rget(Regs *regs, char *name, u64int *u)
 {
 	if(regs == nil){
 		*u = ~(ulong)0;
@@ -35,7 +35,7 @@ rget(Regs *regs, char *name, ulong *u)
 }
 
 int
-_uregrw(Regs *regs, char *name, ulong *u, int isr)
+_uregrw(Regs *regs, char *name, u64int *u, int isr)
 {
 	Regdesc *r;
 	uchar *ureg;
diff --git a/src/libmach/sym.c b/src/libmach/sym.c
index a5b057de..6369cdd1 100644
--- a/src/libmach/sym.c
+++ b/src/libmach/sym.c
@@ -69,7 +69,7 @@ findhdr(char *name)
 }
 
 int
-pc2file(ulong pc, char *file, uint nfile, ulong *line)
+pc2file(u64int pc, char *file, uint nfile, ulong *line)
 {
 	Fhdr *p;
 
@@ -81,14 +81,14 @@ pc2file(ulong pc, char *file, uint nfile, ulong *line)
 }
 
 int
-pc2line(ulong pc, ulong *line)
+pc2line(u64int pc, ulong *line)
 {
 	char tmp[10];	/* just in case */
 	return pc2file(pc, tmp, sizeof tmp, line);
 }
 
 int
-file2pc(char *file, ulong line, ulong *addr)
+file2pc(char *file, ulong line, u64int *addr)
 {
 	Fhdr *p;
 
@@ -102,7 +102,7 @@ file2pc(char *file, ulong line, ulong *addr)
 }
 
 int
-line2pc(ulong basepc, ulong line, ulong *pc)
+line2pc(u64int basepc, ulong line, u64int *pc)
 {
 	Fhdr *p;
 
@@ -116,7 +116,7 @@ line2pc(ulong basepc, ulong line, ulong *pc)
 }
 
 int
-fnbound(ulong pc, ulong *bounds)
+fnbound(u64int pc, u64int *bounds)
 {
 	Fhdr *p;
 	Loc l;
@@ -143,7 +143,7 @@ fnbound(ulong pc, ulong *bounds)
 }
 
 int
-fileline(ulong pc, char *a, uint n)
+fileline(u64int pc, char *a, uint n)
 {
 	ulong line;
 
@@ -408,7 +408,7 @@ findlsym(Symbol *s1, Loc loc, Symbol *s2)
 }
 
 int
-unwindframe(Map *map, Regs *regs, ulong *next, Symbol *sym)
+unwindframe(Map *map, Regs *regs, u64int *next, Symbol *sym)
 {
 	Fhdr *p;
 
@@ -421,7 +421,7 @@ unwindframe(Map *map, Regs *regs, ulong *next, Symbol *sym)
 }
 
 int
-symoff(char *a, uint n, ulong addr, uint class)
+symoff(char *a, uint n, u64int addr, uint class)
 {
 	Loc l;
 	Symbol s;
diff --git a/src/libmach/symdwarf.c b/src/libmach/symdwarf.c
index c56667b1..4552b034 100644
--- a/src/libmach/symdwarf.c
+++ b/src/libmach/symdwarf.c
@@ -6,14 +6,14 @@
 #include "dwarf.h"
 
 static void	dwarfsymclose(Fhdr*);
-static int	dwarfpc2file(Fhdr*, ulong, char*, uint, ulong*);
-static int	dwarfline2pc(Fhdr*, ulong, ulong, ulong*);
+static int	dwarfpc2file(Fhdr*, u64int, char*, uint, ulong*);
+static int	dwarfline2pc(Fhdr*, u64int, ulong, u64int*);
 static int	dwarflookuplsym(Fhdr*, Symbol*, char*, Symbol*);
 static int	dwarfindexlsym(Fhdr*, Symbol*, uint, Symbol*);
 static int	dwarffindlsym(Fhdr*, Symbol*, Loc, Symbol*);
 static void	dwarfsyminit(Fhdr*);
 static int	dwarftosym(Fhdr*, Dwarf*, DwarfSym*, Symbol*, int);
-static int	_dwarfunwind(Fhdr *fhdr, Map *map, Regs *regs, ulong *next, Symbol*);
+static int	_dwarfunwind(Fhdr *fhdr, Map *map, Regs *regs, u64int *next, Symbol*);
 
 int
 symdwarf(Fhdr *hdr)
@@ -43,7 +43,7 @@ dwarfsymclose(Fhdr *hdr)
 }
 
 static int
-dwarfpc2file(Fhdr *fhdr, ulong pc, char *buf, uint nbuf, ulong *line)
+dwarfpc2file(Fhdr *fhdr, u64int pc, char *buf, uint nbuf, ulong *line)
 {
 	char *cdir, *dir, *file;
 
@@ -61,7 +61,7 @@ dwarfpc2file(Fhdr *fhdr, ulong pc, char *buf, uint nbuf, ulong *line)
 }
 
 static int
-dwarfline2pc(Fhdr *fhdr, ulong basepc, ulong line, ulong *pc)
+dwarfline2pc(Fhdr *fhdr, u64int basepc, ulong line, u64int *pc)
 {
 	werrstr("dwarf line2pc not implemented");
 	return -1;
@@ -323,11 +323,11 @@ dwarftosym(Fhdr *fp, Dwarf *d, DwarfSym *ds, Symbol *s, int infn)
 }
 
 static int
-dwarfeval(Dwarf *d, Map *map, Regs *regs, ulong cfa, int rno, DwarfExpr e, ulong *u)
+dwarfeval(Dwarf *d, Map *map, Regs *regs, ulong cfa, int rno, DwarfExpr e, u64int *u)
 {
 	int i;
 	u32int u4;
-	ulong uu;
+	u64int uu;
 
 	switch(e.type){
 	case RuleUndef:
@@ -396,11 +396,11 @@ dwarfexprfmt(Fmt *fmt)
 #endif
 
 static int
-_dwarfunwind(Fhdr *fhdr, Map *map, Regs *regs, ulong *next, Symbol *sym)
+_dwarfunwind(Fhdr *fhdr, Map *map, Regs *regs, u64int *next, Symbol *sym)
 {
 	char *name;
 	int i, j;
-	ulong cfa, pc, u;
+	u64int cfa, pc, u;
 	Dwarf *d;
 	DwarfExpr *e, epc, ecfa;
 
diff --git a/src/libmach/symstabs.c b/src/libmach/symstabs.c
index 472dd872..a8c2af71 100644
--- a/src/libmach/symstabs.c
+++ b/src/libmach/symstabs.c
@@ -254,6 +254,7 @@ stabssyminit(Fhdr *fp)
 			break;
 		}
 	}
+	USED(locals);
 	free(inc);
 	return 0;
 
@@ -263,7 +264,7 @@ err:
 }
 
 static int
-stabspc2file(Fhdr *fhdr, ulong pc, char *buf, uint nbuf, ulong *pline)
+stabspc2file(Fhdr *fhdr, u64int pc, char *buf, uint nbuf, ulong *pline)
 {
 	int i;
 	Symbol *s;
@@ -298,7 +299,7 @@ stabspc2file(Fhdr *fhdr, ulong pc, char *buf, uint nbuf, ulong *pline)
 }
 
 static int
-stabsline2pc(Fhdr *fhdr, ulong startpc, ulong line, ulong *pc)
+stabsline2pc(Fhdr *fhdr, u64int startpc, ulong line, u64int *pc)
 {
 	int i, trigger;
 	Symbol *s;
diff --git a/src/libmach/uregamd64.h b/src/libmach/uregamd64.h
new file mode 100644
index 00000000..2c39f17c
--- /dev/null
+++ b/src/libmach/uregamd64.h
@@ -0,0 +1,58 @@
+// Inferno utils/libmach/ureg6.h
+// http://code.google.com/p/inferno-os/source/browse/utils/libmach/ureg6.h
+//
+//	Copyright © 1994-1999 Lucent Technologies Inc.
+//	Power PC support Copyright © 1995-2004 C H Forsyth (forsyth@terzarima.net).
+//	Portions Copyright © 1997-1999 Vita Nuova Limited.
+//	Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com).
+//	Revisions Copyright © 2000-2004 Lucent Technologies Inc. and others.
+//	Portions Copyright © 2009 The Go Authors.  All rights reserved.
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in
+// all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+// THE SOFTWARE.
+
+struct Ureg {
+	u64int	ax;
+	u64int	bx;
+	u64int	cx;
+	u64int	dx;
+	u64int	si;
+	u64int	di;
+	u64int	bp;
+	u64int	r8;
+	u64int	r9;
+	u64int	r10;
+	u64int	r11;
+	u64int	r12;
+	u64int	r13;
+	u64int	r14;
+	u64int	r15;
+
+	u16int	ds;
+	u16int	es;
+	u16int	fs;
+	u16int	gs;
+
+	u64int	type;
+	u64int	error;		/* error code (or zero) */
+	u64int	ip;		/* pc */
+	u64int	cs;		/* old context */
+	u64int	flags;		/* old flags */
+	u64int	sp;		/* sp */
+	u64int	ss;		/* old stack segment */
+};